Changxu Liu

Orcid: 0009-0000-0132-1461

According to our database¹, Changxu Liu authored at least 4 papers in 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

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2024

A Fully Pipelined Reconfigurable Montgomery Modular Multiplier Supporting Variable Bit-Widths.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2024

PriorMSM: An Efficient Acceleration Architecture for Multi-Scalar Multiplication.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2024

HMNTT: A Highly Efficient MDC-NTT Architecture for Privacy-preserving Applications.

[BibT_eX]

[DOI]

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

Gypsophila: A Scalable and Bandwidth-Optimized Multi-Scalar Multiplication Architecture.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Changxu Liu

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