Chang-Soo Jang

According to our database, Chang-Soo Jang authored at least 4 papers between 2009 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A Non-snapback ESD Protection Clamp Circuit Using Isolated Parasitic Capacitance in a 0.35 µm Bipolar-CMOS-DMOS Process.

Jae-Young Park, Dae-Woo Kim, Young-Sang Son, Jong-Kyu Song, Chang-Soo Jang, Won-Young Jung

IEICE Trans. Electron., 2011

2010

On-Chip Charged Device Model ESD Protection Design Method Using Very Fast Transmission Line Pulse System for RF ICs.

Jae-Young Park, Jong-Kyu Song, Dae-Woo Kim, Chang-Soo Jang, Won-Young Jung, Taek-Soo Kim

IEICE Trans. Electron., 2010

Analysis and modeling of a Low Voltage Triggered SCR ESD protection clamp with the very fast Transmission Line Pulse measurement.

Jae-Young Park, Jong-Kyu Song, Chang-Soo Jang, Young-Sang Son, Dae-Woo Kim

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2009

A Latchup-Free ESD Power Clamp Circuit with Stacked-Bipolar Devices for High-Voltage Integrated Circuits.

Jae-Young Park, Jong-Kyu Song, Chang-Soo Jang, San-Hong Kim, Won-Young Jung, Taek-Soo Kim

IEICE Trans. Electron., 2009