Chang Liu

Orcid: 0000-0003-3099-7385

Affiliations:
  • University of Stuttgart, Institute of Computer Architecture and Computer Engineering, Germany


According to our database1, Chang Liu authored at least 9 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2020
Using Programmable Delay Monitors for Wear-Out and Early Life Failure Prediction.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Built-In Test for Hidden Delay Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Extending Aging Monitors for Early Life and Wear-Out Failure Prevention.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017
Improvement of hardware reliability with aging monitors.
PhD thesis, 2017

Aging monitor reuse for small delay fault testing.
Proceedings of the 35th IEEE VLSI Test Symposium, 2017

2015
Efficient observation point selection for aging monitoring.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

On-line prediction of NBTI-induced aging rates.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
FAST-BIST: Faster-than-at-Speed BIST targeting hidden delay defects.
Proceedings of the 2014 International Test Conference, 2014

2013
Synthesis of workload monitors for on-line stress prediction.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013


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