Chang-Hong Shen
According to our database1,
Chang-Hong Shen
authored at least 5 papers
between 2018 and 2024.
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Bibliography
2024
3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size (25×33mm<sup>2</sup>) Single-Crystalline Si on SiO2 by Elevated-Epi.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2018
Effects of SiO<sub>2</sub> film thickness and operating temperature on thermally-induced failures in through-silicon-via structures.
Microelectron. Reliab., 2018
SiO<sub>2</sub> tunneling and Si<sub>3</sub>N<sub>4</sub>/HfO<sub>2</sub> trapping layers formed with low temperature processes on gate-all-around junctionless charge-trapping flash memory devices.
Microelectron. Reliab., 2018
A Monolithic-3D SRAM Design with Enhanced Robustness and In-Memory Computation Support.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018