Chandramouli Visweswariah

According to our database, Chandramouli Visweswariah authored at least 21 papers between 1988 and 2006.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2006

First-Order Incremental Block-Based Statistical Timing Analysis.

Chandramouli Visweswariah, K. Ravindran, Kerim Kalafala, Steven G. Walker, S. Narayan, Daniel K. Beece, Jeff Piaget, Natesan Venkateswaran, Jeffrey G. Hemmett

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits.

Jochen A. G. Jess, Kerim Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

Large-scale nonlinear optimization in circuit tuning.

Andreas Wächter, Chandramouli Visweswariah, Andrew R. Conn

Future Gener. Comput. Syst., 2005

2004

First-order incremental block-based statistical timing analysis.

Chandramouli Visweswariah, K. Ravindran, Kerim Kalafala, Steven G. Walker, S. Narayan

Proceedings of the 41th Design Automation Conference, 2004

Is statistical timing statistically significant?

Richard Goldman, Kurt Keutzer, Clive Bittlestone, Ahsan Bootehsaz, Shekhar Y. Borkar, E. Chen, Louis Scheffer, Chandramouli Visweswariah

Proceedings of the 41th Design Automation Conference, 2004

2002

Uncertainty-aware circuit optimization.

Xiaoliang Bai, Chandramouli Visweswariah, Philip N. Strenski

Proceedings of the 39th Design Automation Conference, 2002

2001

Overview of continuous optimization advances and applications to circuit tuning.

Andrew R. Conn, Chandramouli Visweswariah

Proceedings of the 2001 International Symposium on Physical Design, 2001

2000

Noise considerations in circuit optimization.

Chandramouli Visweswariah, Ruud A. Haring, Andrew R. Conn

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1999

Formulation of static circuit optimization with reduced size, degeneracy and redundancy by timing graph manipulation.

Chandramouli Visweswariah, Andrew R. Conn

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation.

Andrew R. Conn, Ibrahim M. Elfadel, W. W. Molzen, P. R. O'Brien, Philip N. Strenski, Chandramouli Visweswariah, C. B. Whan

Proceedings of the 36th Conference on Design Automation, 1999

1998

JiffyTune: circuit optimization using time-domain sensitivities.

Andrew R. Conn, Paula K. Coulman, Ruud A. Haring, Gregory L. Morrill, Chandramouli Visweswariah, Chai Wah Wu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Optimization techniques for high-performance digital circuits.

Chandramouli Visweswariah

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Circuit optimization via adjoint Lagrangians.

Andrew R. Conn, Ruud A. Haring, Chandramouli Visweswariah, Chai Wah Wu

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Optimization of custom MOS circuits by transistor sizing.

Andrew R. Conn, Paula K. Coulman, Ruud A. Haring, Gregory L. Morrill, Chandramouli Visweswariah

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Inaccuracies in power estimation during logic synthesis.

Daniel Brand, Chandramouli Visweswariah

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1993

Incremental Event-Driven Simulation of Digital FET Circuits.

Chandramouli Visweswariah, Jalal A. Wehbeh

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

M³-a multilevel mixed-mode mixed A/D simulator.

Rakesh Chadha, Chandramouli Visweswariah, Chin-Fu Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

1991

Piecewise approximate circuit simulation.

Chandramouli Visweswariah, Ronald A. Rohrer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Efficient Simulation of Bipolar Digital ICs.

Chandramouli Visweswariah, Ronald A. Rohrer

Proceedings of the 28th Design Automation Conference, 1991

1990

Incorporation of Inductors in Piecewise Approximate Circuit Simulation.

Chandramouli Visweswariah, Peter Feldmann, Ronald A. Rohrer

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1988

Model Development and Verification for High Level Analog Blocks.

Chandramouli Visweswariah, Rakesh Chadha, Chin-Fu Chen

Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988