Chandra Mulpuri

According to our database, Chandra Mulpuri authored at least 4 papers between 2001 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Clock-Aware FPGA Placement Contest.

Stephen Yang, Chandra Mulpuri, Sainath Reddy, Meghraj Kalase, Srinivasan Dasasathyan, Mehrdad E. Dehkordi, Marvin Tom, Rajat Aggarwal

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

2016

Routability-Driven FPGA Placement Contest.

Stephen Yang, Aman Gayasen, Chandra Mulpuri, Sainath Reddy, Rajat Aggarwal

Proceedings of the 2016 on International Symposium on Physical Design, 2016

2002

A fast, inexpensive and scalable hardware acceleration technique for functional simulation.

Srihari Cadambi, Chandra Mulpuri, Pranav Ashar

Proceedings of the 39th Design Automation Conference, 2002

2001

Runtime and quality tradeoffs in FPGA placement and routing.

Chandra Mulpuri, Scott Hauck

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001