Chaitanya Sathe
According to our database1,
Chaitanya Sathe
authored at least 6 papers
between 2007 and 2014.
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Bibliography
2014
2010
A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit Performance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007