Chaitanya Pasupuleti

According to our database1, Chaitanya Pasupuleti authored at least 1 paper in 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor Activity.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020


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