César Sanz

Orcid: 0000-0002-2411-9132

According to our database1, César Sanz authored at least 75 papers between 1996 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
HyperMRI: hyperspectral and magnetic resonance fusion methodology for neurosurgery applications.
Int. J. Comput. Assist. Radiol. Surg., July, 2024

Implementation of the Principal Component Analysis onto High-Performance Computer Facilities for Hyperspectral Dimensionality Reduction: Results and Comparisons.
CoRR, 2024

In-Vivo Hyperspectral Human Brain Image Database for Brain Cancer Detection.
CoRR, 2024

2023
SLIMBRAIN: Augmented reality real-time acquisition and processing system for hyperspectral classification mapping with depth information for in-vivo surgical procedures.
J. Syst. Archit., 2023

Sparse to Dense Ground Truth Pre-Processing in Hyperspectral Imaging for In-Vivo Brain Tumour Detection.
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023

Real-Time Hyperspectral and Depth Fusion Calibration Method for Improved Reflectance Measures on Arbitrary Complex Surfaces.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Transmittance Hyperspectral Capture System and Methodology Assessment for Blood-Liquid Serum Samples Analysis.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Brain Blood Vessel Segmentation in Hyperspectral Images Through Linear Operators.
Proceedings of the Design and Architecture for Signal and Image Processing, 2023

Deep Recurrent Neural Network Performing Spectral Recurrence on Hyperspectral Images for Brain Tissue Classification.
Proceedings of the Design and Architecture for Signal and Image Processing, 2023

2022
Energy Consumption and Runtime Performance Optimizations Applied to Hyperspectral Imaging Cancer Detection.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Hyperparameter Optimization for Brain Tumor Classification with Hyperspectral Images.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Analysis and methodology for enabling DNN inference in an IoT edge environment in depth completion tasks.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Exploration of Realtime Brain tumor classification from Hyperspectral Images in Heterogeneous Embedded MPSoC.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Data-Type Assessment for Real-Time Hyperspectral Classification in Medical Imaging.
Proceedings of the Design and Architecture for Signal and Image Processing, 2022

2021
Supervised Machine Learning Methods and Hyperspectral Imaging Techniques Jointly Applied for Brain Cancer Classification.
Sensors, 2021

GoRG: Towards a GPU-Accelerated Multiview Hyperspectral Depth Estimation Tool for Medical Applications.
Sensors, 2021

Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI.
CoRR, 2021

Efficient Open Source Software Radio on Heterogeneous Multicore Embedded Platforms.
IEEE Consumer Electron. Mag., 2021

Stitching technique based on SURF for Hyperspectral Pushbroom Linescan Cameras.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

An Embedded GPU Accelerated Hyperspectral Video Classification System in Real-Time.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2020
An FPGA-Based Architecture for the Versatile Video Coding Multiple Transform Selection Core.
IEEE Access, 2020

Towards GPU Accelerated HyperSpectral Depth Estimation in Medical Applications.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Multiclass Brain Tumor Classification Using Hyperspectral Imaging and Supervised Machine Learning.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Hyperspectral Images Acquisition: an Efficient Capture and Processing Stitching Procedure for Medical Environments.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019
Adaptation of an Iterative PCA to a Manycore Architecture for Hyperspectral Image Processing.
J. Signal Process. Syst., 2019

A 2-D Multiple Transform Processor for the Versatile Video Coding Standard.
IEEE Trans. Consumer Electron., 2019

PAPIFY: Automatic Instrumentation and Monitoring of Dynamic Dataflow Applications Based on PAPI.
IEEE Access, 2019

Parallel Implementations Assessment of a Spatial-Spectral Classifier for Hyperspectral Clinical Applications.
IEEE Access, 2019

In-Vivo Hyperspectral Human Brain Image Database for Brain Cancer Detection.
IEEE Access, 2019

Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Characterizing Hyperspectral Data Layouts: Performance and Energy Efficiency in Embedded GPUs for PCA-based Dimensionality Reduction.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018
A High Performance FPGA-Based Architecture for the Future Video Coding Adaptive Multiple Core Transform.
IEEE Trans. Consumer Electron., 2018

Accelerating the K-Nearest Neighbors Filtering Algorithm to Optimize the Real-Time Classification of Human Brain Tumor in Hyperspectral Images.
Sensors, 2018

Implementation of the Principal Component Analysis onto High-Performance Computer Facilities for Hyperspectral Dimensionality Reduction: Results and Comparisons.
Remote. Sens., 2018

A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures Using PAPI.
Proceedings of the 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2018

Automatic instrumentation of dataflow applications using PAPI.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017
Closed-loop power-control governor for multimedia mobile devices.
IEEE Trans. Consumer Electron., 2017

SVM-based real-time hyperspectral image classifier on a manycore architecture.
J. Syst. Archit., 2017

Porting a PCA-based hyperspectral image dimensionality reduction algorithm for brain cancer detection on a manycore architecture.
J. Syst. Archit., 2017

High-level design using Intel FPGA OpenCL: A hyperspectral imaging spatial-spectral classifier.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017

Real-time HEVC decoding with OpenHEVC and OpenMP.
Proceedings of the IEEE International Conference on Consumer Electronics, 2017

Energy consumption characterization of a Massively Parallel Processor Array (MPPA) platform running a hyperspectral SVM classifier.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

Parallel implementation of an iterative PCA algorithm for hyperspectral images on a manycore platform.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

HELICoiD: interdisciplinary and collaborative project for real-time brain cancer detection: Invited Paper.
Proceedings of the Computing Frontiers Conference, 2017

2016
Real-time power-consumption control system for multimedia mobile devices.
IEEE Trans. Consumer Electron., 2016

Design of multicore HEVC decoders using actor-based dataflow models and OpenMP.
IEEE Trans. Consumer Electron., 2016

Real-time power consumption control system for multimedia mobile devices.
Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Demo: HELICoiD tool demonstrator for real-time brain cancer detection.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Hyperspectral image classification using a parallel implementation of the linear SVM on a Massively Parallel Processor Array (MPPA) platform.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015
A multicore DSP HEVC decoder using an actorbased dataflow model and OpenMP.
IEEE Trans. Consumer Electron., 2015

Energy estimation models for video decoders: reconfigurable video coding-CAL case-study.
IET Comput. Digit. Tech., 2015

Modeling, Analysis and Design of a Closed-loop Power Regulation System for Multimedia Embedded Devices.
Proceedings of the PECCS 2015, 2015

A multicore DSP HEVC decoder using an actor-based dataflow model.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

2014
Energy-aware decoder management: a case study on RVC-CAL specification based on just-in-time adaptive decoder engine.
IEEE Trans. Consumer Electron., 2014

On-line energy estimation model of an RVC-CAL HEVC decoder.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

Energy-aware decoders: A case study based on an RVC-CAL specification.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013
Complexity analysis of an HEVC decoder based on a digital signal processor.
IEEE Trans. Consumer Electron., 2013

A PMC-driven methodology for energy estimation in RVC-CAL video codec specifications.
Signal Process. Image Commun., 2013

On an implementation of HEVC video decoders with DSP technology.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

System-level PMC-driven energy estimation models in RVC-CAL video codec specifications.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

2011
A DSP based H.264/SVCdecoder for a multimedia terminal.
IEEE Trans. Consumer Electron., 2011

La Formación en Electrónica en los Nuevos Grados Relacionados con la Ingeniería de Telecomunicación en España.
Rev. Iberoam. de Tecnol. del Aprendiz., 2011

2010
Distortion-Energy Analysis of an OMAP-Based H.264/SVC Decoder.
Proceedings of the Mobile Multimedia Communications - 6th International ICST Conference, 2010

A Test Bench for Distortion-Energy Optimization of a DSP-Based H.264/SVC Decoder.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
An H.264 video decoder based on a latest generation DSP.
IEEE Trans. Consumer Electron., 2009

2008
A DSP Based H.264 Decoder for a Multi-Format IP Set-Top Box.
IEEE Trans. Consumer Electron., 2008

2007
A real-time H.264 MP decoder based on a DM642 DSP.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006
A DSP based IP set-top box for home entertainment.
IEEE Trans. Consumer Electron., 2006

The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting (DAB) Networks.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006

2005
The rapid prototyping experience of an H.263 video coder onto FPGA.
Microprocess. Microsystems, 2005

2003
A flexible architecture for H.263 video coding.
J. Syst. Archit., 2003

2002
An FPGA implementation of a flexible architecture for H.263 video coding.
IEEE Trans. Consumer Electron., 2002

A Flexible H.263 Video Coder Prototype Based on FPGA.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002

1996
FPGA Implementation of the Block-Matching Algorithm for Motion Estimation in Image Coding.
Proceedings of the Field-Programmable Logic, 1996

VLSI Architecture for Motion Estimation using the Block-Matching Algorithm.
Proceedings of the 1996 European Design and Test Conference, 1996


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