Carsten Tradowsky

According to our database1, Carsten Tradowsky authored at least 16 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Auto-SI: An adaptive reconfigurable processor with run-time loop detection and acceleration.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Pegasus: Efficient data transfers for PGAS languages on non-cache-coherent many-cores.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Methoden zur applikationsspezifischen Effizienzsteigerung adaptiver Prozessorplattformen.
PhD thesis, 2016

Adaptive Cache Structures.
Proceedings of the Architecture of Computing Systems - ARCS 2016, 2016

A Dynamic Cache Architecture for Efficient Memory Resource Allocation in Many-Core Systems.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

A Novel Concept for Adaptive Signal Processing on Reconfigurable Hardware.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
SmartLoCore: A Concept for an Adaptive Power-Aware Localization Processor.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Towards Dynamic Cache and Bandwidth Invasion.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
LImbiC: An adaptable architecture description language model for developing an application-specific image processor.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

ViSA: A highly efficient slot architecture enabling multi-objective ASIP cores.
Proceedings of the 2013 International Symposium on System on Chip, 2013

2012
LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture.
Proceedings of the 7th IEEE International Symposium on Industrial Embedded Systems, 2012

Adaptive processor architecture - invited paper.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Determination of on-chip temperature gradients on reconfigurable hardware.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

On Dynamic Run-time Processor Pipeline Reconfiguration.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Dynamic Processor Reconfiguration.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011


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