Carsten Reuter

According to our database1, Carsten Reuter authored at least 11 papers between 1997 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2005
A multi-core SoC design for advanced image and video compression.
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms.
Proceedings of the Computer Systems: Architectures, 2004

2002
Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications.
Proceedings of the 13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 2002

2001
Architecture Concepts for Multimedia Signal Processing.
J. VLSI Signal Process., 2001

The Effect of FPGA Granularity on Video Codec Implementations.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000
Rapid Prototyping von Videosignalverarbeitungsverfahren (Rapid Prototyping of Video Processing Schemes).
Informationstechnik Tech. Inform., 2000

A Mapping Methodology for Code Trees onto LUT-Based FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
The Video and Image Processing Emulation System VIPES.
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998

A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 1998

1997
Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997


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