Carlos Villarraga
Orcid: 0000-0002-7699-8917
According to our database1,
Carlos Villarraga
authored at least 13 papers
between 2013 and 2017.
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Bibliography
2017
A HW/SW Cross-Layer Approach for Determining Application-Redundant Hardware Faults in Embedded Systems.
J. Electron. Test., 2017
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
2016
A computer-algebraic approach to formal verification of data-centric low-level software.
Proceedings of the 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, 2016
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016
Proceedings of the International Symposium on Integrated Circuits, 2016
2014
Efficient SAT/simulation-based model generation for low-level embedded software.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014
Software in a hardware view: New models for HW-dependent software in SoC verification and test.
Proceedings of the 2014 International Test Conference, 2014
A property language for the specification of hardware-dependent embedded system software.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014
2013
IPSJ Trans. Syst. LSI Des. Methodol., 2013
Proceedings of the 11th ACM/IEEE International Conference on Formal Methods and Models for Codesign, 2013
A Hardware-Dependent Model for SAT-based Verification of Interrupt-Driven Low-level Embedded System Software.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
A computational model for SAT-based verification of hardware-dependent low-level embedded system software.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013