Carlo Sau
Orcid: 0000-0003-0436-2706
According to our database1,
Carlo Sau
authored at least 42 papers
between 2012 and 2023.
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Bibliography
2023
J. Signal Process. Syst., September, 2023
2022
Proceedings of the 13th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 11th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2022
2021
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project.
Microprocess. Microsystems, November, 2021
ACM Trans. Embed. Comput. Syst., 2021
The Multi-Dataflow Composer tool: An open-source tool suite for optimized coarse-grain reconfigurable hardware accelerators and platform design.
Microprocess. Microsystems, 2021
CoRR, 2021
2020
ACM Trans. Design Autom. Electr. Syst., 2020
IEEE Access, 2020
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
Layering the monitoring action for improved flexibility and overhead control: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2020
2019
J. Syst. Archit., 2019
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators.
IEEE Embed. Syst. Lett., 2019
Reconfigurable Adaptive Multiple Transform Hardware Solutions for Versatile Video Coding.
IEEE Access, 2019
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
NeuPow: artificial neural networks for power and behavioral modeling of arithmetic components in 45nm ASICs technology.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019
2018
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018
2017
Power-Awarness in Coarse-Grained Reconfigurable Multi-Functional Architectures: a Dataflow Based Strategy.
J. Signal Process. Syst., 2017
Hardware design methodology using lightweight dataflow and its integration with low power techniques.
J. Syst. Archit., 2017
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing.
IEEE Embed. Syst. Lett., 2017
Feasibility Study of Real-Time Spiking Neural Network Simulations on a Swarm Intelligence Based Digital Architecture.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2017
2016
J. Signal Process. Syst., 2016
J. Signal Process. Syst., 2016
Modelling and Automated Implementation of Optimal Power Saving Strategies in Coarse-Grained Reconfigurable Architectures.
J. Electr. Comput. Eng., 2016
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
Computing Swarms for Self-Adaptiveness and Self-Organization in Floating-Point Array Processing.
ACM Trans. Auton. Adapt. Syst., 2015
IET Comput. Digit. Tech., 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015
2014
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
2013
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013
A coarse-grained reconfigurable wavelet denoiser exploiting the Multi-Dataflow Composer tool.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012