Carlo Guardiani
Orcid: 0000-0002-8914-9260
According to our database1,
Carlo Guardiani
authored at least 30 papers
between 1993 and 2024.
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On csauthors.net:
Bibliography
2024
Sensors, May, 2024
2023
Integrated Approach Including Docking, MD Simulations, and Network Analysis Highlights the Action Mechanism of the Cardiac hERG Activator RPR260243.
J. Chem. Inf. Model., August, 2023
2021
Application of a Statistical and Linear Response Theory to Multi-Ion Na+ Conduction in NaChBac.
Entropy, 2021
2020
Changes in Ion Selectivity Following the Asymmetrical Addition of Charge to the Selectivity Filter of Bacterial Sodium Channels.
Entropy, 2020
2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004
Proceedings of the Cellular Automata, 2004
2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
2001
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001
2000
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
Design-Manufacturing Interface in the Deep Submicron: Is Technology Independent Design Dead?
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component mismatch effects.
Proceedings of the 37th Conference on Design Automation, 2000
1999
Proceedings of the 36th Conference on Design Automation, 1999
Fast and accurate power verification of a Viterbi decoder IP based on mixed-level power simulation technique with automatic spatio-temporal circuit partitioning.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999
1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998
Reduced Order Macromodel of Coupled Interconnects for Timing and Functional Verification of Sub Half-micron IC Designs.
Proceedings of the ASP-DAC '98, 1998
1997
Proceedings of the 34st Conference on Design Automation, 1997
1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Hierarchical statistical characterization of mixed-signal circuits using behavioral modeling.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
1995
An Assigned Probability Technique to Derive Realistic Worst-Case Timing Models of Digital Standard Cells.
Proceedings of the 32st Conference on Design Automation, 1995
1993
A 3.3-V 800-nV/sub rms/ noise, gain-programmable CMOS microphone preamplifier design using yield modeling technique.
IEEE J. Solid State Circuits, August, 1993
IEEE J. Solid State Circuits, July, 1993