Carl Ramey

According to our database1, Carl Ramey authored at least 8 papers between 1998 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020

Silicon Photonics for Artificial Intelligence Acceleration : HotChips 32.
Proceedings of the IEEE Hot Chips 32 Symposium, 2020

2011
TILE-Gx100 ManyCore processor: Acceleration interfaces and architecture.
Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2008
TILE64 - Processor: A 64-Core SoC with Mesh Interconnect.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
On-Chip Interconnection Architecture of the Tile Processor.
IEEE Micro, 2007

2001
A Simulation-Based Method for the Verification of Shared Memory in Multiprocessor Systems.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

1998
Zen and the art of Alpha verification.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor.
Proceedings of the 35th Conference on Design Automation, 1998


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