Carl Edward Gray

Orcid: 0000-0002-9628-6650

According to our database1, Carl Edward Gray authored at least 13 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Understanding how technology can support social-emotional learning of children: a dyadic trauma-informed participatory design with proxies.
Proceedings of the 2023 CHI Conference on Human Factors in Computing Systems, 2023

2021
Safety, Connection and Reflection: Designing with Therapists for Children with Serious Emotional Behaviour Issues.
Proceedings of the CHI '21: CHI Conference on Human Factors in Computing Systems, 2021

2013
Practical methods for extending ATE to 40 and 50Gbps.
Proceedings of the 2013 IEEE International Test Conference, 2013

2012
An fpga based architecture for native protocol testing of multi-gbps source-synchronous devices.
PhD thesis, 2012

Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter.
Proceedings of the 2012 IEEE International Test Conference, 2012

2011
Extending a DWDM Optical Network Test System to 12 Gbps x4 Channels.
J. Electron. Test., 2011

Two methods for 24 Gbps test signal synthesis.
Proceedings of the Design, Automation and Test in Europe, 2011

Burst-Mode Transmission and Data Recovery for Multi-GHz Optical Packet Switching Network Testing.
Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010
Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic.
J. Electron. Test., 2010

2009
A development platform and electronic modules for automated test up to 20 Gbps.
Proceedings of the 2009 IEEE International Test Conference, 2009

2007
Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network.
Proceedings of the 2007 IEEE International Test Conference, 2007

2005
Implementing multi-gigahertz test systems using CMOS FPGAs and PECL components.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL.
Proceedings of the 2005 Design, 2005


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