Carl Ebeling

According to our database, Carl Ebeling authored at least 52 papers between 1984 and 2020.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2020

Mapping Stencils on Coarse-grained Reconfigurable Spatial Architecture.

Jesmin Jahan Tithi, Fabrizio Petrini, Hongbo Rong, Andrei Valentin, Carl Ebeling

CoRR, 2020

2016

Stratix™ 10 High Performance Routable Clock Networks.

Carl Ebeling, Dana How, David M. Lewis, Herman Schmit

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2012

Adding dataflow-driven execution control to a Coarse-Grained Reconfigurable Array.

Robin Panda, Carl Ebeling, Scott Hauck

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Hardware Acceleration of Short Read Mapping.

Corey B. Olson, Maria Kim, Cooper Clauson, Boris Kogon, Carl Ebeling, Scott Hauck, Walter L. Ruzzo

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011

Crunching Large Graphs with Commodity Processors.

Jacob Nelson, Brandon Myers, A. H. Hunter, Preston Briggs, Luis Ceze, Carl Ebeling, Dan Grossman, Simon Kahan, Mark Oskin

Proceedings of the 3rd USENIX Workshop on Hot Topics in Parallelism, 2011

Energy-efficient specialization of functional units in a coarse-grained reconfigurable array.

Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebeling, Scott Hauck

Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, 2011

2010

Managing Short-Lived and Long-Lived Values in Coarse-Grained Reconfigurable Arrays.

Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebeling, Scott Hauck

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays.

Brian Van Essen, Aaron Wood, Allan Carroll, Stephen Friedman, Robin Panda, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

SPR: an architecture-adaptive CGRA mapping tool.

Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, Scott Hauck

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2007

Abstract Verilog: A Hardware Description Language for Novice Students.

Carl Ebeling, Brian French

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006

PipeRoute: a pipelining-aware router for reconfigurable architectures.

Akshay Sharma, Carl Ebeling, Scott Hauck

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding.

Allan Carroll, Carl Ebeling

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Type Architecture for Hybrid Micro-Parallel Computers.

Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Configurable Computing Platforms - Promises, Promises.

Carl Ebeling

Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

2005

Architecture-Adaptive Routability-Driven Placement for FPGAs.

Akshay Sharma, Carl Ebeling, Scott Hauck

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Architecture Adaptive Routability-Driven Placement for FPGAs (abstract only).

Akshay Sharma, Carl Ebeling, Scott Hauck

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004

Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture.

Carl Ebeling, Chris Fisher, Guanbin Xing, Manyuan Shen, Hui Liu

IEEE Trans. Computers, 2004

QuickRoute: a fast routing algorithm for pipelined architectures.

Song Li, Carl Ebeling

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Exploration of pipelined FPGA interconnect structures.

Akshay Sharma, Katherine Compton, Carl Ebeling, Scott Hauck

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

A compiled accelerator for biological cell signaling simulations.

John F. Keane, Christopher Bradley, Carl Ebeling

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003

PipeRoute: a pipelining-aware router for FPGAs.

Akshay Sharma, Carl Ebeling, Scott Hauck

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

2001

An Emulator for Exploring RaPiD Configurable Computing Architectures.

Chris Fisher, Kevin Rennie, Guanbin Xing, Stefan G. Berg, Kevin Bolding, John H. Naegle, Daniel Parshall, Dmitriy Portnov, Adnan Sulejmanpasic, Carl Ebeling

Proceedings of the Field-Programmable Logic and Applications, 2001

2000

Distributed-memory parallel routing for field-programmable gatearrays.

Pak K. Chan, Martine D. F. Schlag, Carl Ebeling, Larry McMurchie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1999

Architecture Design of Reconfigurable Pipelined Datapaths.

Darren C. Cronquist, Chris Fisher, Miguel E. Figueroa, Paul Franklin, Carl Ebeling

Proceedings of the 18th Conference on Advanced Research in VLSI (ARVLSI '99), 1999

1998

Mesh routing topologies for multi-FPGA systems.

Scott Hauck, Gaetano Borriello, Carl Ebeling

IEEE Trans. Very Large Scale Integr. Syst., 1998

Using precomputation in architecture and logic resynthesis.

Soha Hassoun, Carl Ebeling

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Specifying and Compiling Applications for RaPiD.

Darren C. Cronquist, Paul Franklin, Stefan G. Berg, Carl Ebeling

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997

Seeking Solutions in Configurable Computing.

William H. Mangione-Smith, Brad Hutchins, David L. Andrews, André DeHon, Carl Ebeling, Reiner W. Hartenstein, Oskar Mencer, John Morris, Krishna V. Palem, Viktor K. Prasanna, Henk A. E. Spaanenburg

Computer, 1997

ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing.

Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Lawrence Snyder

Proceedings of the Parallel Computer Routing and Communication, 1997

Whither Configurable Computing?

Carl Ebeling

Proceedings of the 30th Annual Hawaii International Conference on System Sciences (HICSS-30), 1997

Mapping applications to the RaPiD configurable architecture.

Carl Ebeling, Darren C. Cronquist, Paul Franklin, Jason Secosky, Stefan G. Berg

Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

Configurable computing: the catalyst for high-performance architectures.

Carl Ebeling, Darren C. Cronquist, Paul Franklin

Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

1996

RaPiD - Reconfigurable Pipelined Datapath.

Carl Ebeling, Darren C. Cronquist, Paul Franklin

Proceedings of the Field-Programmable Logic, 1996

Architectural Retiming: Pipelining Latency-Constrained Circuts.

Soha Hassoun, Carl Ebeling

Proceedings of the 33st Conference on Design Automation, 1996

1995

Placement and routing tools for the Triptych FPGA.

Carl Ebeling, Larry McMurchie, Scott Hauck, Steven M. Burns

IEEE Trans. Very Large Scale Integr. Syst., 1995

The Triptych FPGA architecture.

Gaetano Borriello, Carl Ebeling, Scott Hauck, Steven M. Burns

IEEE Trans. Very Large Scale Integr. Syst., 1995

PathFinder: A Negotiation-based Performance-driven Router for FPGAs.

Larry McMurchie, Carl Ebeling

Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

On the performance of level-clocked circuits.

Carl Ebeling, Brian Lockyear

Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI '95), 1995

1994

Optimal retiming of level-clocked circuits using symmetric clock schedules.

Brian Lockyear, Carl Ebeling

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

An FPGA for Implementing Asynchronous Circuits.

Scott Hauck, Steven M. Burns, Gaetano Borriello, Carl Ebeling

IEEE Des. Test Comput., 1994

CRANIUM: An Interface for Message Passing on Adaptive Packet Routing Networks.

Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Lawrence Snyder

Proceedings of the Parallel Computer Routing and Communication, 1994

1993

The chaos router chip: design and implementation of an adaptive router.

Kevin Bolding, Sen-Ching S. Cheung, Sung-Eun Choi, Carl Ebeling, Soha Hassoun, Ton Anh Ngo, Robert Wille

Proceedings of the VLSI 93, 1993

The practical application of retiming to the design of high-performance systems.

Brian Lockyear, Carl Ebeling

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

SubGemini: Identifying SubCircuits using a Fast Subgraph Isomorphism Algorithm.

Miles Ohlrich, Carl Ebeling, Eka Ginting, Lisa Sather

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

MONTAGNE: An FPL for Synchronous and Asynchronous Circuits.

Scott Hauck, Gaetano Borriello, Steven M. Burns, Carl Ebeling

Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

1990

Measuring the Performance Potential of Chess Programs.

Hans J. Berliner, Gordon Goetsch, Murray Campbell, Carl Ebeling

Artif. Intell., 1990

1989

Apex: two architectures for generating parametric curves and surfaces.

Tony DeRose, Mary L. Bailey, Bill Barnard, Robert Cypher, David Dobrikin, Carl Ebeling, Smaragda Konstantinidou, Larry McMurchie, Haim Mizrahi, Bill Yost

Vis. Comput., 1989

Pattern Knowledge and Search: The SUPREM Architecture.

Hans J. Berliner, Carl Ebeling

Artif. Intell., 1989

WireLisp: combining graphics and procedures in a circuit specification language.

Carl Ebeling, Zhanbing Wu

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

GeminiII: a second generation layout validation program.

Carl Ebeling

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

1986

The SUPREM Architecture: A New Intelligent Paradigm.

Hans J. Berliner, Carl Ebeling

Artif. Intell., 1986

1984

The Design and Implementation of a VLSI Chess Move Generator.

Carl Ebeling, Andrew J. Palay

Proceedings of the 11th Annual Symposium on Computer Architecture, 1984