Câncio Monteiro

Orcid: 0000-0002-5264-2326

According to our database1, Câncio Monteiro authored at least 11 papers between 2011 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

2012
2014
2016
2018
2020
0
1
2
3
4
5
1
1
1
1
3
3
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Ultra-Low-Power FinFETs-Based TPCA-PUF Circuit for Secure IoT Devices.
Sensors, 2021

2018
Low Power Source Biased Semi-Adiabatic Logic Circuit for IoT Devices.
Proceedings of the 2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2018

2015
Low-power secure S-box circuit using charge-sharing symmetric adiabatic logic for advanced encryption standard hardware design.
IET Circuits Devices Syst., 2015

2014
Process variation verification of low-power secure CSSAL AES S-box circuit.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

An LSI implementation of a bit-parallel cellular multiplier over GF(2<sup>4</sup>) using secure charge-sharing symmetric adiabatic logic.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Effectiveness of dual-rail CSSAL against power analysis attack under CMOS process variation.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013
Charge-sharing symmetric adiabatic logic in countermeasure against power analysis attacks at cell level.
Microelectron. J., 2013

Robust secure charge-sharing symmetric adiabatic logic against side-channel attacks.
Proceedings of the 36th International Conference on Telecommunications and Signal Processing, 2013

DPA resistance of charge-sharing symmetric adiabatic logic.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Low power secure CSSAL bit-parallel multiplier over GF(2<sup>4</sup>) in 0.18μm CMOS technology.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

2011
Resistance against power analysis attacks on adiabatic dynamic and adiabatic differential logics for smart card.
Proceedings of the International Symposium on Intelligent Signal Processing and Communications Systems, 2011


  Loading...