Can Ni

Orcid: 0009-0004-3434-2882

According to our database1, Can Ni authored at least 8 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters.
IEEE J. Solid State Circuits, June, 2024

Analyzing the Correlation and Risk-Return Trade-off: An Application of the GED-GARCH Model to China's Convertible Bond and Stock Markets.
Proceedings of the 2024 International Conference on Digital Society and Artificial Intelligence, 2024

2023
A Bit-Serial, Compute-in-SRAM Design Featuring Hybrid-Integrating ADCs and Input Dependent Binary Scaled Precharge Eliminating DACs for Energy-Efficient DNN Inference.
IEEE J. Solid State Circuits, 2023

Compute-MLROM: Compute-in-Multi Level Read Only Memory for Energy Efficient Edge AI Inference Engines.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2022
Ising-CIM: A Reconfigurable and Scalable Compute Within Memory Analog Ising Accelerator for Solving Combinatorial Optimization Problems.
IEEE J. Solid State Circuits, 2022

Gain-Cell CIM: Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt Trigger ADCs.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021
16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2017
Time-Domain Arithmetic Logic Unit With Built-In Interconnect.
IEEE Trans. Very Large Scale Integr. Syst., 2017


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