Camelia Hora

According to our database, Camelia Hora authored at least 24 papers between 2002 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Diagnosis of Interconnect Full Open Defects in the Presence of Gate Leakage Currents.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2012

Diagnosis of Local Spot Defects in Analog Circuits.

Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir, Camelia Hora, Yizi Xing, Bram Kruseman

IEEE Trans. Instrum. Meas., 2012

Defect Oriented Testing for Analog/Mixed-Signal Designs.

Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing

IEEE Des. Test Comput., 2012

2011

Gate Leakage Impact on Full Open Defects in Interconnect Lines.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Very Large Scale Integr. Syst., 2011

Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Defect Oriented Testing for analog/mixed-signal devices.

Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing

Proceedings of the 2011 IEEE International Test Conference, 2011

Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example.

Hamidreza Hashempour, Jos Dohmen, Bratislav Tasic, Bram Kruseman, Camelia Hora, Maikel van Beurden, Yizi Xing

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Impact of Temperature on Test Quality.

Lavanya Jagan, Camelia Hora, Bram Kruseman, Stefan Eichenberger, Ananta K. Majhi, V. Kamakoti

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

Diagnosis of full open defects in interconnect lines with fan-out.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 15th European Test Symposium, 2010

2009

Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs.

Friedrich Hapke, Rene Krenz-Baath, Andreas Glowatz, Jürgen Schlöffel, Hamidreza Hashempour, Stefan Eichenberger, Camelia Hora, Dan Adolfsson

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Full Open Defects in Nanometric CMOS.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Time-dependent Behaviour of Full Open Defects in Interconnect Lines.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman

Proceedings of the 2008 IEEE International Test Conference, 2008

Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality.

Stefan Eichenberger, Jeroen Geuzebroek, Camelia Hora, Bram Kruseman, Ananta K. Majhi

Proceedings of the 2008 IEEE International Test Conference, 2008

2007

Extending gate-level diagnosis tools to CMOS intra-gate faults.

Xinyue Fan, Will R. Moore, Camelia Hora, Guido Gronthoud

IET Comput. Digit. Tech., 2007

Diagnosis of Full Open Defects in Interconnecting Lines.

Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages.

Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

2006

A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis.

Xinyue Fan, Will R. Moore, Camelia Hora, Mario Konijnenburg, Guido Gronthoud

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2005

A novel stuck-at based method for transistor stuck-open fault diagnosis.

Xinyue Fan, Will R. Moore, Camelia Hora, Guido Gronthoud

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Stuck-open fault diagnosis with stuck-at model.

Xinyue Fan, Will R. Moore, Camelia Hora, Guido Gronthoud

Proceedings of the 10th European Test Symposium, 2005

2004

Trends in Testing Integrated Circuits.

Bart Vermeulen, Camelia Hora, Bram Kruseman, Erik Jan Marinissen, Robert Van Rijsinge

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Systematic Defects in Deep Sub-Micron Technologies.

Bram Kruseman, Ananta K. Majhi, Camelia Hora, Stefan Eichenberger, Johan Meirlevede

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003

On a Statistical Fault Diagnosis Approach Enabling Fast Yield Ramp-Up.

Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg

J. Electron. Test., 2003

Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model.

Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

2002

An Effective Diagnosis Method to Support Yield Improvement.

Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002