Calebe Micael de Oliveira Conceição

Orcid: 0000-0001-8341-5313

According to our database1, Calebe Micael de Oliveira Conceição authored at least 7 papers between 2015 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Security Issues in the Design of Chips for IoT.
Proceedings of the 6th IEEE World Forum on Internet of Things, 2020

2019
Transistor Count Reduction by Gate Merging.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Netlist Optimization by Gate Merging.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Exploring area and total wirelength using a cell merging technique.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

2017
A cell clustering technique to reduce transistor count.
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2016
Reducing the number of transistors with gate clustering.
Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2015
Efficient emulation of quantum circuits on classical hardware.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015


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