C. Z. Zhao
According to our database1,
C. Z. Zhao
authored at least 29 papers
between 2011 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Emerging Optical In-Memory Computing Sensor Synapses Based on Low-Dimensional Nanomaterials for Neuromorphic Networks.
Adv. Intell. Syst., 2022
2021
Artificial synaptic behavior and its improvement of RRAM device with stacked solution-processed MXene layers.
Proceedings of the 18th International SoC Design Conference, 2021
Long-Term Memory Performance with Learning Behavior of Artificial Synaptic Memristor Based on Stacked Solution-Processed Switching Layers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Proceedings of the International Conference on IC Design and Technology, 2021
Proceedings of the International Conference on IC Design and Technology, 2021
Proceedings of the International Conference on IC Design and Technology, 2021
Resistive switching performance of memristor with solution-processed stacked MO/2D-materials switching layers.
Proceedings of the International Conference on IC Design and Technology, 2021
Proceedings of the International Conference on IC Design and Technology, 2021
An environmentally friendly solution-processed ZrLaO gate dielectric for large-area applications in the harsh radiation environment.
Proceedings of the International Conference on IC Design and Technology, 2021
Proceedings of the International Conference on IC Design and Technology, 2021
Research on Two-dimensional MXenes Based Synaptic Devices for the Future In-memory Computing.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
Effect of High-k Passivation Layer on High Voltage Properties of GaN Metal-Insulator-Semiconductor Devices.
IEEE Access, 2020
Proceedings of the International SoC Design Conference, 2020
Facile Route for Low-temperature Eco-friendly Solution Processed ZnSnO Thin-film Transistors.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2019
Monolithic GaN Half-Bridge Stages With Integrated Gate Drivers for High Temperature DC-DC Buck Converters.
IEEE Access, 2019
Resistive Switching Behavior of Solution-Processed AlOx, based RRAM with Ni and TiN Top Electrode at Low Annealing Temperatures.
Proceedings of the 2019 International SoC Design Conference, 2019
Solution Processed ZnSnO Thin-film Transistors with Peroxide- Aluminum Oxide Dielectric.
Proceedings of the International Conference on IC Design and Technology, 2019
Proceedings of the International Conference on IC Design and Technology, 2019
Characteristics of Ni/AlOx/Pt RRAM devices with various dielectric fabrication temperatures.
Proceedings of the International Conference on IC Design and Technology, 2019
Plasma-Enhanced Combustion-Processed Al2O3 Gate Oxide for In2O3 Thin Film Transistors.
Proceedings of the International Conference on IC Design and Technology, 2019
Enhanced Biased Radiation and Illumination Stress Stability of Solution-processed AlOx Dielectrics using Hydrogen Peroxide.
Proceedings of the International Conference on IC Design and Technology, 2019
The Impact of Etch Depth of D-mode AlGaN/GaN MIS-HEMTs on DC and AC Characteristics of 10 V Input Direct-Coupled FET Logic (DCFL) Inverters.
Proceedings of the International Conference on IC Design and Technology, 2019
Effect of High-k Passivation Layer on Electrical Properties of GaN Metal-Insulator-Semiconductor Devices.
Proceedings of the International Conference on IC Design and Technology, 2019
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2018
Proceedings of the International SoC Design Conference, 2018
Proceedings of the International SoC Design Conference, 2018
2011
Standard cell library establishment and simulation for scan D flip-flops based on 0.5 micron CMOS mixed-signal process.
Proceedings of the International SoC Design Conference, 2011
Performance-effective compaction of standard cell library for edge-triggered latches utilizing 0.5 micron technology.
Proceedings of the International SoC Design Conference, 2011