C. Y. Roger Chen

According to our database, C. Y. Roger Chen authored at least 70 papers between 1988 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

CWcollab: Presenting multimedia with web-based context-aware collaboration.

Chunxu Tang, Beinan Wang, C. Y. Roger Chen, Huijun Wu

Entertain. Comput., 2022

2021

CWcollab: A Context-Aware Web-Based Collaborative Multimedia System.

Chunxu Tang, Beinan Wang, C. Y. Roger Chen, Huijun Wu

Proceedings of the ICC 2021, 2021

2016

Transistor and pin reordering for leakage reduction in CMOS circuits.

Jae Woong Chun, C. Y. Roger Chen

Microelectron. J., 2016

Leakage power reduction using the body bias and pin reordering technique.

Jae Woong Chun, Chien-Yi Roger Chen

IEICE Electron. Express, 2016

2015

Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model.

Jiani Xie, C. Y. Roger Chen

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

2012

A tool to generate models based on behavioral IBIS models.

B. S. Deepaksubramanyan, C. Y. Roger Chen, Adrian Nunez

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2008

Modeling and reduction of complex timing constraints in high performance digital circuits.

Veerapaneni Nagbhushan, C. Y. Roger Chen

Proceedings of the 26th International Conference on Computer Design, 2008

2007

Algorithms to simplify multi-clock/edge timing constraints.

Veerapaneni Nagbhushan, C. Y. Roger Chen

Proceedings of the 25th International Conference on Computer Design, 2007

An efficient gate delay model for VLSI design.

Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen

Proceedings of the 25th International Conference on Computer Design, 2007

A technique for selecting CMOS transistor orders.

Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen

Proceedings of the 25th International Conference on Computer Design, 2007

2003

Detailed Placement with Net Length Constraints.

Bill Halpin, Naresh Sehgal, C. Y. Roger Chen

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

A novel ultra-fast heuristic for VLSI CAD steiner trees.

Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2001

Timing Driven Placement using Physical Net Constraints.

Bill Halpin, C. Y. Roger Chen, Naresh Sehgal

Proceedings of the 38th Design Automation Conference, 2001

2000

Methodologies for Designing Video Servers.

Dikran S. Meliksetian, Frank Feng-Kuo Yu, C. Y. Roger Chen

IEEE Trans. Multim., 2000

Partitionable multistage interconnection networks. Part 2: Task migration schemes.

Muhammad Naeem Ayyaz, Dikran S. Meliksetian, C. Y. Roger Chen

Telecommun. Syst., 2000

A novel technique for sea of gates global routing.

Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

A sensitivity based placer for standard cells.

Bill Halpin, C. Y. Roger Chen, Naresh Sehgal

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1999

Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology.

Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian

Discret. Appl. Math., 1999

1998

Partitionable multistage interconnection networks. Part 1: Dynamic subcube compaction.

Muhammad Naeem Ayyaz, Dikran S. Meliksetian, C. Y. Roger Chen

Telecommun. Syst., 1998

Technique for Planning of Terminal Locations of Leaf Cells in Cell-Based Design with Routing Considerations.

Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal

Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997

Smoothing Algorithms for the Delivery of Compressed Video.

Tacettin Kiprulu, Dikran S. Meliksetian, C. Y. Roger Chen

Proceedings of the 1997 IEEE International Conference on Communications: Towards the Knowledge Millennium, 1997

1996

Transistor Chaining in CMOS Leaf Cells of Planar Topology.

Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian

Proceedings of the 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), 1996

1995

A queueing analysis of the performance of DQDB.

C. Y. Roger Chen, Georges A. Makhoul, Dikran S. Meliksetian

IEEE/ACM Trans. Netw., 1995

A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks.

C. Y. Roger Chen, Shuo-Hsien Hsiao, Abdulaziz S. Almazyad

IEEE/ACM Trans. Netw., 1995

LILA: layout generation for iterative logic arrays.

Qinghong Wu, C. Y. Roger Chen, Bradley S. Carlson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

A pin permutation algorithm for improving over-the-cell channel routing.

C. Y. Roger Chen, Cliff Yungchin Hou

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

A preprocessor for improving channel routing hierarchical pin permutation.

C. Y. Roger Chen, Cliff Yungchin Hou, Bradley S. Carlson

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Dual Eulerian Properties of Plane Multigraphs.

Bradley S. Carlson, C. Y. Roger Chen, Dikran S. Meliksetian

SIAM J. Discret. Math., 1995

Design of a Multimedia Object-Oriented DBMS.

C. Y. Roger Chen, Dikran S. Meliksetian, M. C. Chang, L. J. Liu

Multim. Syst., 1995

Special Issue on Multimedia Processing and Technology.

Arif Ghafoor, C. Y. Roger Chen

J. Parallel Distributed Comput., 1995

Synthesis of Asynchronous Circuits - Testing Unique Circuit Behavior of Signal Transition Graphs.

Calvin J. A. Hsia, C. Y. Roger Chen

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

An analytical model for partially blocking finite-buffered switching networks.

James V. Luciani, C. Y. Roger Chen

IEEE/ACM Trans. Netw., 1994

Performance analysis of single-buffered multistage interconnection networks.

Shuo-Hsien Hsiao, C. Y. Roger Chen

IEEE Trans. Commun., 1994

Optimal algorithms for bubble sort based non-Manhattan channel routing.

C. Y. Roger Chen, Cliff Yungchin Hou, Uminder Singh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

Multimedia Object Modeling and Storage Allocation Strategies.

Kingsley C. Nwosu, C. Y. Roger Chen, P. Bruce Berra

J. Intell. Inf. Syst., 1994

Performance Evaluation of HIPPI Interconnection System Using a Camp-On Strategy.

Abdulaziz S. Mazyad, C. Y. Roger Chen

Proceedings of the Proceedings 19th Conference on Local Computer Networks, 1994

A High Performance General Purpose Multi-Point Signal Router.

Naresh Kumar Seghal, C. Y. Roger Chen, John M. Acken

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Efficent Boolean Matching Algorithm for Cell Libraries.

Qinghong Wu, C. Y. Roger Chen, John M. Acken

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

An object-oriented cell library manager.

Naresh Sehgal, C. Y. Roger Chen, John M. Acken

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A gridless multi-layer area router.

Naresh Sehgal, C. Y. Roger Chen, John M. Acken

Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

Synthesis of Application-Specific Multiprocessor Systems.

Muhammad K. Dhodhi, Imtiaz Ahmad, C. Y. Roger Chen

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

A new technique for exploiting regularity in data path synthesis.

C. Y. Roger Chen, Mohammed Aloqeely

Proceedings of the Proceedings EURO-DAC'94, 1994

Sequencer-Based Data Path Synthesis of Regular Iterative Algorithms.

Mohammed Aloqeely, C. Y. Roger Chen

Proceedings of the 31st Conference on Design Automation, 1994

1993

Optimal Routing Algorithm and the Diameter of the Cube-Connected Cycles.

Dikran S. Meliksetian, C. Y. Roger Chen

IEEE Trans. Parallel Distributed Syst., 1993

A Markov-Modulated Bernoulli Process Approximation for the Analysis of Banyan Networks.

Dikran S. Meliksetian, C. Y. Roger Chen

Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1993

A New Model for the Performance Evaluation of Synchronous Circuit Switched Multistage Interconnection Networks.

Shuo-Hsien Hsiao, C. Y. Roger Chen

Proceedings of the Seventh International Parallel Processing Symposium, 1993

Modeling and Storage Allocation Strategies for Homogeneous Parallel Access Storage Devices in Real Time Multimedia Information Processing.

C. Y. Roger Chen, Kingsley C. Nwosu, P. Bruce Berra

Proceedings of the Computing and Information, 1993

Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering.

Bradley S. Carlson, C. Y. Roger Chen

Proceedings of the 30th Design Automation Conference. Dallas, 1993

Multimedia object modelling and storage allocation strategies for heterogeneous parallel access storage devices in real time multimedia computing systems.

C. Y. Roger Chen, Kingsley C. Nwosu, P. Bruce Berra

Proceedings of the Seventeenth Annual International Computer Software and Applications Conference, 1993

1992

Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy.

Shuo-Hsien Hsiao, C. Y. Roger Chen

IEEE Trans. Parallel Distributed Syst., 1992

From logic to symbolic layout for gate matrix.

Uminder Singh, C. Y. Roger Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Performance Analysis of Communications in Static Interconnection Networks.

Dikran S. Meliksetian, C. Y. Roger Chen

Proceedings of the 1992 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, 1992

The Signal Flow Model: A novel Data Driven Approach to Parallel Processing.

Muhammad F. Mudawwar, C. Y. Roger Chen

Proceedings of the 1992 International Conference on Parallel Processing, 1992

Issues in Networking and Data Management of Distributed Multimedia Systems.

P. Bruce Berra, C. Y. Roger Chen, Arif Ghafoor, Thomas D. C. Little

Proceedings of the First International Symposium on High Performance Distributed Computing, 1992

A heuristic for data path synthesis using multiport memories.

Imtiaz Ahmad, C. Y. Roger Chen

Proceedings of the Second Great Lakes Symposium on VLSI, 1992

1991

A delay distribution methodology for the optimal systolic synthesis of linear recurrence algorithms.

C. Y. Roger Chen, Michael Z. Moricz

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Optimal cell generation for dual independent layout styles.

Bradley S. Carlson, C. Y. Roger Chen, Uminder Singh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Multimedia Synchronization.

Thomas D. C. Little, C. Y. Roger Chen, C. S. Chang, P. Bruce Berra

IEEE Data Eng. Bull., 1991

A Hierarchical Methodology to Improve Channel Routing by Pin Permutation.

Cliff Yungchin Hou, C. Y. Roger Chen

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Post-Processor for Data Path Synthesis Using Multiport Memories.

Imtiaz Ahmad, C. Y. Roger Chen

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Datapath Scheduling for Two-Level Pipelining.

C. Y. Roger Chen, Michael Z. Moricz

Proceedings of the 28th Design Automation Conference, 1991

1990

Architecture for distributed multimedia database systems.

P. Bruce Berra, C. Y. Roger Chen, Arif Ghafoor, Chin Chung Lin, Thomas D. C. Little, Donghoon Shin

Comput. Commun., 1990

Communication Aspects of the Cube Connected Cycles.

Dikran S. Meliksetian, C. Y. Roger Chen

Proceedings of the 1990 International Conference on Parallel Processing, 1990

Permutation Capability of Multistage Interconnection Networks.

Calvin J. A. Hsia, C. Y. Roger Chen

Proceedings of the 1990 International Conference on Parallel Processing, 1990

Embedding Networks with Ring Connections in Hypercube Machines.

C. Y. Roger Chen, Yeh-Ching Chung

Proceedings of the 1990 International Conference on Parallel Processing, 1990

A Transistor Reordering Technique for Gate Matrix Layout.

Uminder Singh, C. Y. Roger Chen

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

On a class of (2n-1)-stage rearrangeable interconnection networks.

Calvin J. A. Hsia, C. Y. Roger Chen

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1988

TOBOL - a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems.

C. Y. Roger Chen

Proceedings of the 1988 Internation Conference on Computer Languages, 1988

A new layout optimization methodology for CMOS complex gates.

C. Y. Roger Chen, Cliff Yungchin Hou

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

A new algorithm for CMOS gate matrix layout.

C. Y. Roger Chen, Cliff Yungchin Hou

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988