C. W. Liu

According to our database, C. W. Liu authored at least 8 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Engineering HZO by Flat Amorphous TiN with 0.3nm Roughness Achieving Uniform c-Axis Alignment, Record High Breakdown Field (~10nm HZO), and Record Final 2Pr of 56 μC/cm² with Endurance > 4E12.

Zefu Zhao, Yu-Rui Chen, Yu-Tsung Liao, Yun-Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Yu-An Chen, Hao-Yi Lu, Wei-Teng Hsu, Dai-Ying Lee, Ming-Hsiu Lee, C. W. Liu

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

3D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 10⁹ Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMs.

J.-Y. Lee, F.-S. Chang, Kuo-Yu Hsiang, P.-H. Chen, Z.-F. Luo, Z.-X. Li, J.-H. Tsai, C. W. Liu, Min-Hung Lee

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM Operations.

Kuo-Yu Hsiang, J.-Y. Lee, F.-S. Chang, Z.-F. Lou, Z.-X. Li, Z.-H. Li, J.-H. Chen, C. W. Liu, T.-H. Hou, Min-Hung Lee

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61mV/dec, Ioff<10^-7 μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °C.

Jih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Yu-Ciao Chen, Yu-Cheng Fan, C. W. Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Cryogenic Endurance of Anti-ferroelectric and Ferroelectric Hf_1-xZr_XO₂ for Quantum Computing Applications.

Kuo-Yu Hsiang, Jia-Yang Lee, Z.-F. Lou, F.-S. Chang, Z.-X. Li, C. W. Liu, T.-H. Hou, P. Su, Min-Hung Lee

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022

Interfacial-Layer Design for Hf1-xZrxO2-Based FTJ Devices: From Atom to Array.

H.-L. Chiang, J.-F. Wang, K.-H. Lin, C.-H. Nien, J.-J. Wu, Kuo-Yu Hsiang, C.-P. Chuu, Y.-W. Chen, X. W. Zhang, C. W. Liu, Tahui Wang, C. C. Wang, Min-Hung Lee, M.-F. Chang, C.-S. Chang, T. C. Chen

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020

Mobility Enhancement and Reliability Characterization of Back-Channel-Etch Amorphous InGaZnO TFT with Double Layers.

Chia-Chun Yen, An-Hung Tai, Yu-Chieh Liu, Chun-Hung Yeh, C. W. Liu

Proceedings of the 2020 Device Research Conference, 2020

2014

A web services-based multidisciplinary design optimization framework for complex engineering systems with uncertainties.

C. W. Liu, X. X. Jin, Liansheng Li

Comput. Ind., 2014