C. S. Chiang

According to our database, C. S. Chiang authored at least 1 paper in 1995.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1995

A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology.

James B. Kuo, K. W. Su, J. H. Lou, S. S. Chen, C. S. Chiang

IEEE J. Solid State Circuits, January, 1995