C. Asero

According to our database1, C. Asero authored at least 2 papers in 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 800Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5nm FinFet Process.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024


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