Byung-Kwon An

According to our database1, Byung-Kwon An authored at least 4 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2024
A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023

Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023


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