Byung-Hoon Suh

According to our database, Byung-Hoon Suh authored at least 4 papers between 1992 and 1996.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1996

A 117-mm² 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications.

Tae-Sung Jung, Young-Joon Choi, Kang-Deog Suh, Byung-Hoon Suh, Jin-Ki Kim, Young-Ho Lim, Yong-Nam Koh, Jong-Wook Park, Ki-Jong Lee, Jung-Hoon Park, Kee-Tae Park, Jhang-Rae Kim, Jeong-Hyong Yi, Hyung-Kyu Lim

IEEE J. Solid State Circuits, 1996

1995

A 3.3 V 32 Mb NAND flash memory with incremental step pulse programming scheme.

Kang-Deog Suh, Byung-Hoon Suh, Young-Ho Lim, Jin-Ki Kim, Young-Joon Choi, Yong-Nam Koh, Sung-Soo Lee, Suk-Chon Kwon, Byung-Soon Choi, Jin-Sun Yum, Jung-Hyuk Choi, Jang-Rae Kim, Hyung-Kyu Lim

IEEE J. Solid State Circuits, November, 1995

1993

Development of a Benchmark to Measure System Robustness.

Daniel P. Siewiorek, John J. Hudak, Byung-Hoon Suh, Zary Segall

Proceedings of the Digest of Papers: FTCS-23, 1993

1992

Development of a benchmark to measure system robustness: experiences and lessons learned.

Byung-Hoon Suh, John J. Hudak, Daniel P. Siewiorek, Zary Segall

Proceedings of the Third International Symposium on Software Reliability Engineering, 1992