Byoungdeog Choi

Orcid: 0000-0003-0411-4323

According to our database1, Byoungdeog Choi authored at least 6 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2012
2014
2016
2018
2020
2022
2024
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1
2
3
4
3
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Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
String-level compact modeling of erase operations in the body-floated vertical channel of 3D charge trapping flash memory.
Microelectron. J., 2024

Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM.
IEEE Access, 2024

Novel Dual Work Function Buried Channel Array Transistor Process Design for Sub-17 nm DRAM.
IEEE Access, 2024

2017
Novel Method for Nondestructive Body Effect Measurement in Dynamic Random Access Memory.
J. Electron. Test., 2017

2012
The effect of gate overlap lightly doped drains on low temperature poly-Si thin film transistors.
Microelectron. Reliab., 2012

Current-voltage characteristics of vertical diodes for next generation memories.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012


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