Byeongho Kim
Orcid: 0000-0002-3227-2436
According to our database1,
Byeongho Kim
authored at least 14 papers
between 2019 and 2024.
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Bibliography
2024
IEEE Trans. Computers, October, 2024
IEEE Micro, 2024
Duplex: A Device for Large Language Models with Mixture of Experts, Grouped Query Attention, and Continuous Batching.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024
Proceedings of the 38th ACM International Conference on Supercomputing, 2024
2023
Proceedings of the 35th IEEE Hot Chips Symposium, 2023
2022
MVP: An Efficient CNN Accelerator with Matrix, Vector, and Processing-Near-Memory Units.
ACM Trans. Design Autom. Electr. Syst., 2022
GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks.
IEEE Comput. Archit. Lett., 2022
Proceedings of the IEEE International Symposium on Workload Characterization, 2022
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
2020
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks.
IEEE Trans. Computers, 2020
2019
Proceedings of the Second Conference on Machine Learning and Systems, SysML 2019, 2019