Byamakesh Nayak
Orcid: 0000-0001-8342-9053
According to our database1,
Byamakesh Nayak
authored at least 10 papers
between 2017 and 2024.
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Bibliography
2024
Improvement of the Quality of Question Papers for Online Examinations Toward Simultaneous Enhancement of Students' Learning.
IEEE Trans. Learn. Technol., 2024
2023
A Study on the Implications of Parameter Variation Involved with Dynamic Wireless Charging System for Vehicular Application.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023
2022
A Novel Benzene Structured Array Configuration for Harnessing Maximum Power From PV Array Under Partial Shading Condition With Reduced Number of Cross Ties.
IEEE Access, 2022
2021
A 7-Level Switched Capacitor Multilevel Inverter With Reduced Switches and Voltage Stresses.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
Int. J. Circuit Theory Appl., 2020
2019
A Novel Switch Current Stress Reduction Technique for Single Switch Boost-Flyback Integrated High Step Up DC-DC Converter.
IEEE Trans. Ind. Electron., 2019
J. Intell. Fuzzy Syst., 2019
2018
Voltage stress analysis of a single switch high boost converter with mixed CCM-DCM mode useful for snubber design.
Int. J. Circuit Theory Appl., 2018
2017
Validation of Well-Known Population-Based Stochastic Optimization Algorithms Using Benchmark Functions.
Proceedings of the Soft Computing for Problem Solving, 2017