Burnell G. West

According to our database1, Burnell G. West authored at least 12 papers between 1983 and 2004.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2004
Digital Synchronization for Reconfigurable ATE.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Open Architecture ATE: Prospects and Problems.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003
Multi-GB/s IC Test Challenges and Solutions.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Simultaneous Bidirectional Test Data Flow for a Low-cost Wafer Test Strategy.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002
Open ATE Architecture: Key Challenges.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
Rapid-response temperature control provides new defect screening opportunities.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000
The path to one-picosecond accuracy.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999
At-speed structural test.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Accuracy requirements in at-speed functional test.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998
Functional ATE can meet the challenges.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1994
500-MHz Testing on a 100-MHz Tester.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1983
Attainable Accuracy of Autocalibrating VLSI Test Systems.
Proceedings of the Proceedings International Test Conference 1983, 1983


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