Bruno Zatt

J. Real Time Image Process., 2018

Exploring Heterogeneous Task-Level Parallelism in a BMA Video Coding Application using System-Level Simulation.

[BibT_eX]

[DOI]

Carlos Michel Betemps

Mateus Santos De Melo

Proceedings of the VIII Brazilian Symposium on Computing Systems Engineering, 2018

Low-Power and High-Throughput Architecture for 3D-HEVC Depth Modeling Mode 4.

[BibT_eX]

[DOI]

Mariana Ucker

Luan Audibert

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

A Power-Efficient and High-Throughput Hardware Design for 3D-HEVC Disparity Estimation.

[BibT_eX]

[DOI]

Murilo R. Perleberg

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

High Throughput Multiplierless Architecture for VP9 Fractional Motion Estimation.

[BibT_eX]

[DOI]

Jones Goebel

Lucas Barreiro Agostini

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Low-Power HEVC 1-D IDCT Hardware Architecture.

[BibT_eX]

[DOI]

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Hybrid Memory Cube in Embedded Systems.

[BibT_eX]

[DOI]

Carlos Michel Betemps

Maurício Lima Pilla

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

ASIC power-estimation accuracy evaluation: A case study using video-coding architectures.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Fast and energy-efficient HEVC transrating based on frame partitioning inheritance.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

High-Throughput Binary Arithmetic Encoder using Multiple-Bypass Bins Processing for HEVC CABAC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Configurable Cache Memory Architecture for Low-Energy Motion Estimation.

[BibT_eX]

[DOI]

Anderson Martins

Matheus Weber

Júlio C. B. de Mattos

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

OTED: Encoding Optimization Technique Targeting Energy-Efficient HEVC Decoding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

High-Throughput and Low-Power Integrated Direct/Inverse HEVC Quantization Hardware Design.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC.

[BibT_eX]

[DOI]

Murilo R. Perleberg

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

LF-CAE: Context-Adaptive Encoding for Lenslet Light Fields Using HEVC.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Image Processing, 2018

Memory-Aware Tiles Workload Balance through Machine-Learnt Complexity Reduction for HEVC.

[BibT_eX]

[DOI]

Iago Storch

Alessandro Via Piana Saggiorato

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

HEVC Residual Syntax Elements Generation Architecture for High-Throughput CABAC Design.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Power-Efficient and Memory-Aware Approximate Hardware Design for HEVC FME Interpolator.

[BibT_eX]

[DOI]

Luís Alberto da Silva Cruz

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Learning-Based Complexity Reduction and Scaling for HEVC Encoders.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

Octagonal-Axis Raster Pattern for Improved Test Zone Search Motion Estimation.

[BibT_eX]

[DOI]

Paulo Goncalves

Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

2017

Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding.

[BibT_eX]

[DOI]

Muhammad Usman Karim Khan

Semeen Rehman

Florian Kriebel

Arun Subramaniyan

IEEE Trans. Computers, 2017

Energy-aware scheme for the 3D-HEVC depth maps prediction.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2017

Complexity control of HEVC encoders targeting real-time constraints.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2017

Rate and Complexity-Aware Coding Scheme for Fixed-Camera Videos Based on Region-of-Interest Detection.

[BibT_eX]

[DOI]

Cristiano Santos

Proceedings of the 23rd Brazillian Symposium on Multimedia and the Web, 2017

Objective and Subjective Video Quality Assessment in Mobile Devices for Low-Complexity H.264/AVC Codecs.

[BibT_eX]

[DOI]

Proceedings of the 23rd Brazillian Symposium on Multimedia and the Web, 2017

Video Quality Assessment of Early SKIP/DIS for 3D-HEVC Complexity Reduction.

[BibT_eX]

[DOI]

Proceedings of the 23rd Brazillian Symposium on Multimedia and the Web, 2017

Cache Memory Energy Efficiency Exploration for the HEVC Motion Estimation.

[BibT_eX]

[DOI]

Júlio C. B. de Mattos

Proceedings of the VII Brazilian Symposium on Computing Systems Engineering, 2017

Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture.

[BibT_eX]

[DOI]

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Segmented spline hardware design for high dynamic range video pre-processor.

[BibT_eX]

[DOI]

Alex Borges

Luana Vieira Martinez Bonatto

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Low-power multi-size HEVC DCT architecture proposal for QFHD video processing.

[BibT_eX]

[DOI]

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing.

[BibT_eX]

[DOI]

Camila de Matos Alonso

Roger Endrigo Carvalho Porto

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Energy-efficient motion estimation with approximate arithmetic.

[BibT_eX]

[DOI]

Nuno Roma

Leonel Sousa

Proceedings of the 19th IEEE International Workshop on Multimedia Signal Processing, 2017

Multiple early-termination scheme for TZ search algorithm based on data mining and decision trees.

[BibT_eX]

[DOI]

Paulo Goncalves

Proceedings of the 19th IEEE International Workshop on Multimedia Signal Processing, 2017

Characterizing energy consumption in software HEVC encoders: HM vs x265.

[BibT_eX]

[DOI]

Italo Machado

Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

Energy evaluation of the HEVC decoding for different encoding configurations.

[BibT_eX]

[DOI]

Douglas Corrêa

Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

High-throughput HEVC intrapicture prediction hardware design targeting UHD 8K videos.

[BibT_eX]

[DOI]

Marcel Moscarelli Corrêa

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A multiplierless parallel HEVC quantization hardware for real-time UHD 8K video coding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Low-power and high-throughput hardware design for the 3D-HEVC depth intra skip.

[BibT_eX]

[DOI]

Luan Audibert

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Edge-aware depth motion estimation - A complexity reduction scheme for 3D-HEVC.

[BibT_eX]

[DOI]

César A. M. Marcon

Proceedings of the 25th European Signal Processing Conference, 2017

Complexity reduction of 3D-HEVC based on depth analysis for background and ROI classification.

[BibT_eX]

[DOI]

Proceedings of the 25th European Signal Processing Conference, 2017

2016

Low-power hardware design for the HEVC Binary Arithmetic Encoder targeting 8K videos.

[BibT_eX]

[DOI]

Jones Goebel

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A parallel Motion Estimation solution for heterogeneous System on Chip.

[BibT_eX]

[DOI]

Mateus Melo

Gustavo H. Smaniotto

Leomar Rosa

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Complexity-scalable HEVC encoding.

[BibT_eX]

[DOI]

Mateus Grellert

Proceedings of the 2016 Picture Coding Symposium, 2016

Solutions for DMM-1 complexity reduction in 3D-HEVC based on gradient calculation.

[BibT_eX]

[DOI]

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Energy analisys of motion estimation memory transference on embedded processors.

[BibT_eX]

[DOI]

Mateus Melo

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Rate-distortion-complexity analysis for prediction unit modes in 3D-HEVC depth coding.

[BibT_eX]

[DOI]

Giovanni Avila

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

Energy-aware cache assessment of HEVC decoding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs.

[BibT_eX]

[DOI]

Jones Goebel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Speedup-aware history-based tiling algorithm for the HEVC standard.

[BibT_eX]

[DOI]

Iago Storch

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

Pareto-based energy control for the HEVC encoder.

[BibT_eX]

[DOI]

Italo Machado

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

An efficient sub-sample interpolator hardware for VP9-10 standards.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

Complexity reduction for 3D-HEVC depth map coding based on early Skip and early DIS scheme.

[BibT_eX]

[DOI]

Giovanni Avila

Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

Real-time simplified edge detector architecture for 3D-HEVC depth maps coding.

[BibT_eX]

[DOI]

César A. M. Marcon

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

DMMFast: a complexity reduction scheme for three-dimensional high-efficiency video coding intraframe depth map coding.

[BibT_eX]

[DOI]

J. Electronic Imaging, 2015

Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos.

[BibT_eX]

[DOI]

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264/AVC Video Encoder.

[BibT_eX]

[DOI]

Marcel Moscarelli Corrêa

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Memory-Aware and High-Throughput Hardware Design for the HEVC Fractional Motion Estimation.

[BibT_eX]

[DOI]

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

S-GMOF: A gradient-based complexity reduction algorithm for depth-maps intra prediction on 3D-HEVC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

A multi-standard interpolation filter for motion compensated prediction on high definition videos.

[BibT_eX]

[DOI]

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Hardware design of fast HEVC 2-D IDCT targeting real-time UHD 4K applications.

[BibT_eX]

[DOI]

Andrio Araujo

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

A real-time architecture for reference frame compression for high definition video coders.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Complexity reduction for the 3D-HEVC depth maps coding.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Rate-distortion and energy performance of HEVC and H.264/AVC encoders: A comparative analysis.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A multi-standard interpolation hardware solution for H.264 and HEVC.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Image Processing, 2015

Approximation-aware Multi-Level Cells STT-RAM cache architecture.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Compilers, 2015

2014

Parallelization of Full Search Motion Estimation Algorithm for Parallel and Distributed Platforms.

[BibT_eX]

[DOI]

Eduarda Monteiro

Marilena Maule

Int. J. Parallel Program., 2014

A complexity reduction algorithm for depth maps intra prediction on the 3D-HEVC.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

Sample adaptive offset filter hardware design for HEVC encoder.

[BibT_eX]

[DOI]

Fabiane Rediess

Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

A Real-Time 5-Views HD 1080p Architecture for 3D-HEVC Depth Modeling Mode 4.

[BibT_eX]

[DOI]

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

A Memory Energy Consumption Analysis of Motion Estimation Algorithms using Data Reuse in Video Coding Systems.

[BibT_eX]

[DOI]

Lívia Amaral

Dieison Silveira

Guilherme Povala

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Rate-distortion and energy performance of HEVC video encoders.

[BibT_eX]

[DOI]

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

An efficient reference frame compression approach for video coding systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

HEVC Fractional Motion Estimation complexity reduction for real-time applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Configurable hardware design for the HEVC-based Adaptive Loop Filter.

[BibT_eX]

[DOI]

Fabiane Rediess

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Overview and quality analysis in 3D-HEVC emergent video coding standard.

[BibT_eX]

[DOI]

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Memory energy consumption reduction in video coding systems.

[BibT_eX]

[DOI]

Lívia Amaral

Dieison Silveira

Guilherme Povala

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Content-driven memory pressure balancing and video memory power management for parallel high efficiency video coding.

[BibT_eX]

[DOI]

Felipe Martin Sampaio

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders.

[BibT_eX]

[DOI]

J. Claudio de Souza

Ricardo Jeske

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Complexity reduction for 3D-HEVC depth maps intra-frame prediction using simplified edge detector algorithm.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Energy-efficient architecture for advanced video memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

A low-complexity and lossless reference frame encoder algorithm for video coding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2014

Cost function optimization and its hardware design for the Sample Adaptive Offset of HEVC standard.

[BibT_eX]

[DOI]

Fabiane Rediess

Proceedings of the 22nd European Signal Processing Conference, 2014

dSVM: Energy-efficient distributed Scratchpad Video Memory Architecture for the next-generation High Efficiency Video Coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Model Predictive Hierarchical Rate Control With Markov Decision Process for Multiview Video Coding.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2013

A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile.

[BibT_eX]

[DOI]

Leandro M. de L. Silva

J. Real Time Image Process., 2013

Adaptive content-based Tile partitioning algorithm for the HEVC standard.

[BibT_eX]

[DOI]

Proceedings of the 30th Picture Coding Symposium, 2013

Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Image Processing, 2013

An energy-efficient hardware design for lossless reference frame compression in video coders.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Electronics, 2013

ES&IS: Enhanced Spread and Iterative Search hardware-friendly motion estimation algorithm for the HEVC Standard.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Electronics, 2013

High throughput hardware design for the HEVC Fractional Motion Estimation Interpolation Unit.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Electronics, 2013

Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

3D Video Coding for Embedded Devices - Energy Efficient Algorithms and Architectures.

[BibT_eX]

[DOI]

Springer, ISBN: 978-1-4614-6758-8, 2013

2012

A complexity reduction scheme with adaptive search direction and mode elimination for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 Picture Coding Symposium, 2012

A Model Predictive Controller for Frame-Level Rate Control in Multiview Video Coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

Real-time block matching motion estimation onto GPGPU.

[BibT_eX]

[DOI]

Eduarda Monteiro

Marilena Maule

Proceedings of the 19th IEEE International Conference on Image Processing, 2012

Power-efficient error-resiliency for H.264/AVC Context-Adaptive Variable Length Coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Adaptive power management of on-chip video memory for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Applying CUDA Architecture to Accelerate Full Search Block Matching Algorithm for High Performance Motion Estimation in Video Encoding.

[BibT_eX]

[DOI]

Eduarda Monteiro

Proceedings of the 23rd International Symposium on Computer Architecture and High Performance Computing, 2011

A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p.

[BibT_eX]

[DOI]

Cristiano Thiele

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A multi-level dynamic complexity reduction scheme for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Image Processing, 2011

A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Run-time adaptive energy-aware motion and disparity estimation in multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

Timing and interface communication analysis of H.264/AVC encoder using SystemC model.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

An adaptive early skip mode decision scheme for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the Picture Coding Symposium, 2010

Power-aware complexity-scalable multiview video coding for mobile devices.

[BibT_eX]

[DOI]

Proceedings of the Picture Coding Symposium, 2010

Gop structure adaptive to the video content for efficient H.264/AVC encoding.

[BibT_eX]

[DOI]

Jacob Scharcanski

Proceedings of the International Conference on Image Processing, 2010

A high throughput CAVLC hardware architecture with parallel coefficients processing for HDTV H.264/AVC enconding.

[BibT_eX]

[DOI]

Thaísa Leal da Silva

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

A method for HW functional verification through HW/SW co-simulation in complex systems: H.264/AVC decoder as case study.

[BibT_eX]

[DOI]

Dieison Antonello Deprá

Proceedings of the 10th Latin American Test Workshop, 2009

A real time H.264/AVC intra frame prediction hardware architecture for HDTV 1080P video.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009

High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard.

[BibT_eX]

[DOI]

Thaísa Leal da Silva

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

High throughput architecture for H.264/AVC motion compensation sample interpolator for HDTV.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

HP422-MoCHA: A H.264/AVC High Profile motion compensation architecture for HDTV.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Design and FPGA Prototyping of a H.264/AVC Main Profile.

[BibT_eX]

[DOI]

Arnaldo P. Azevedo Filho

Wagston T. Staehler

Vagner S. Rosa

Ana Cristina Medina Pinto

Roger Endrigo Carvalho Porto

Roger Endrigo Carvalho Porto

J. Braz. Comput. Soc., 2007

FPGA Prototyping Strategy for a H.264/AVC Video Decoder.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Motion Compensation Hardware Accelerator Architecture for H.264/AVC.

[BibT_eX]

[DOI]

Valter Ferreira

Flávio Rech Wagner

Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007

Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV.

[BibT_eX]

[DOI]