Bruno Vaz

According to our database, Bruno Vaz authored at least 11 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

On Creation of Synthetic Samples from GANs for Fake News Identification Algorithms.

Bruno Vaz, Vítor Bernardes, Álvaro Figueira

Proceedings of the Information Systems and Technologies, 2022

2018

A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET.

Bruno Vaz, Bob Verbruggen, Christophe Erdmann, Diarmuid Collins, John McGrath, Ali Boumaalif, Edward Cullen, Darragh Walsh, Alonso Morgado, Conrado Mesadri, Brian Long, Rajitha Pathepuram, Ronnie De La Torre, Alvin Manlapat, Georgios Karyotis, Dimitris Tsaliagos, Patrick Lynch, Peng Lim, Daire Breathnach, Brendan Farley

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A modular 16NM Direct-RF TX/RX Embedding 9GS/S DAC and 4.5GS/S ADC with 90DB Isolation and Sub-80PS Channel Alignment for Monolithic Integration in 5G Base-Station SoC.

Christophe Erdmann, Bob Verbruggen, Bruno Vaz, Roberto Pelliconi, John McGrath, Ryan Kinnerk, Ronnie De La Torre, John O'Dwyer, Patrick Lynch, Padraig Kelly, Peng Lim, Daire Breathnach, Brendan Farley

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017

16.1 A 13b 4GS/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC.

Bruno Vaz, Adrian Lynam, Bob Verbruggen, Asma Laraba, Conrado Mesadri, Ali Boumaalif, John McGrath, Umanath Kamath, Ronnie De La Torre, Alvin Manlapat, Daire Breathnach, Christophe Erdmann, Brendan Farley

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A programmable RFSoC in 16nm FinFET technology for wideband communications.

Brendan Farley, Christophe Erdmann, Bruno Vaz, John McGrath, Edward Cullen, Bob Verbruggen, Roberto Pelliconi, Daire Breathnach, Peng Lim, Ali Boumaalif, Patrick Lynch, Conrado Mesadri, David Melinn, Kwee Peng Yap, Liam Madden

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2006

A 0.9V ΔΣ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique.

João Goes, Bruno Vaz, Rui Monteiro, Nuno Paulino

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme.

João Goes, Nuno Paulino, H. Pinto, Rui Monteiro, Bruno Vaz, Adolfo Steiger-Garção

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacing.

Bruno Vaz, João Goes, R. Piloto, J. Neto, Rui Monteiro, Nuno Paulino

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Switched-capacitor circuits using a single-phase scheme.

João Goes, Bruno Vaz, Nuno Paulino, H. Pinto, Rui Monteiro, Adolfo Steiger-Garção

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2003

Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performance.

Romero Tavares, Bruno Vaz, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion.

Bruno Vaz, Nuno F. Paulino, João Goes, R. Costa, Romero Tavares, Adolfo Steiger-Garção

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002