Bruno Sá

According to our database, Bruno Sá authored at least 6 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation.

Luca Valente, Alessandro Nadalini, Asif Hussain Chiralil Veeran, Mattia Sinigaglia, Bruno Sá, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala, Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2024

"Interrupting" the Status Quo: A First Glance at the RISC-V Advanced Interrupt Architecture (AIA).

Francisco Marques, Manuel Rodriguez, Bruno Sá, Sandro Pinto

IEEE Access, 2024

2023

CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration.

Bruno Sá, Luca Valente, José Martins, Davide Rossi, Luca Benini, Sandro Pinto

IEEE Trans. Very Large Scale Integr. Syst., November, 2023

Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs.

Luca Valente, Asif Veeran, Mattia Sinigaglia, Yvan Tortorella, Alessandro Nadalini, Nils Wistoff, Bruno Sá, Angelo Garofalo, Rafail Psiakis, M. Tolba, Ari Kulmala, Nimisha Limaye, Ozgur Sinanoglu, Sandro Pinto, Daniele Palossi, Luca Benini, Baker Mohammad, Davide Rossi

Proceedings of the 35th IEEE Hot Chips Symposium, 2023

Holistic RISC-V Virtualization: CVA6-based SoC.

Bruno Sá, Francisco Marques, Manuel Rodriguez, José Martins, Sandro Pinto

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

A First Look at RISC-V Virtualization From an Embedded Systems Perspective.

Bruno Sá, José Martins, Sandro Pinto

IEEE Trans. Computers, 2022