Bruno Robisson

Orcid: 0000-0003-0408-315X

According to our database1, Bruno Robisson authored at least 40 papers between 2001 and 2018.

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Bibliography

2018
All paths lead to Rome: Polymorphic Runtime Code Generation for Embedded Systems.
Proceedings of the Fifth Workshop on Cryptography and Security in Computing Systems, 2018

An Evaluation Tool for Physical Attacks.
Proceedings of the Ad-hoc, Mobile, and Wireless Networks, 2018

Automatic Application of Software Countermeasures Against Physical Attacks.
Proceedings of the Cyber-Physical Systems Security., 2018

2017
Smart security management in secure devices.
J. Cryptogr. Eng., 2017

Runtime Code Polymorphism as a Protection Against Side Channel Attacks.
IACR Cryptol. ePrint Arch., 2017

2016
Physical functions: the common factor of side-channel and fault attacks?
J. Cryptogr. Eng., 2016

Compilation of a Countermeasure Against Instruction-Skip Fault Attacks.
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016

New Partitioning Approach for Hardware Trojan Detection Using Side-Channel Measurements.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Experimental validation of a Bulk Built-In Current Sensor for detecting laser-induced currents.
Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

Resilient hardware Trojans detection based on path delay measurements.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

Evidence of an information leakage between logically independent blocks.
Proceedings of the Second Workshop on Cryptography and Security in Computing Systems, 2015

SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015

Hardware trojan detection by delay and electromagnetic measurements.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Formal verification of a software countermeasure against instruction skip attacks.
J. Cryptogr. Eng., 2014

A Unified Formalism for Physical Attacks.
IACR Cryptol. ePrint Arch., 2014

Electromagnetic analysis and fault injection onto secure circuits.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI).
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

COGITO: Code Polymorphism to Secure Devices.
Proceedings of the SECRYPT 2014, 2014

Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Experimental evaluation of two software countermeasures against fault attacks.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

2013
Practical measurements of data path delays for IP authentication & integrity verification.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Fault Injection to Reverse Engineer DES-Like Cryptosystems.
Proceedings of the Foundations and Practice of Security - 6th International Symposium, 2013

Electromagnetic Fault Injection: Towards a Fault Model on a 32-bit Microcontroller.
Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2013

2012
Injection of transient faults using electromagnetic pulses -Practical results on a cryptographic system-.
IACR Cryptol. ePrint Arch., 2012

A DFA on AES Based on the Entropy of Error Distributions.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

Electromagnetic Transient Faults Injection on a Hardware and a Software Implementations of AES.
Proceedings of the 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2012

Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2012

2011
Design and characterisation of an AES chip embedding countermeasures.
Int. J. Intell. Eng. Informatics, 2011

ElectroMagnetic analysis (EMA) of software AES on Java mobile phones.
Proceedings of the 2011 IEEE International Workshop on Information Forensics and Security, 2011

Implementation of Complex Strategies of Security Insecure Embedded Systems.
Proceedings of the 4th IFIP International Conference on New Technologies, 2011

A side-channel and fault-attack resistant AES circuit working on duplicated complemented values.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Low-cost recovery for the code integrity protection in secure embedded processors.
Proceedings of the HOST 2011, 2011

Local and Direct EM Injection of Power Into CMOS Integrated Circuits.
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011

2010
Experimental Fault Injection based on the Prototyping of an AES Cryptosystem.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

Low-cost fault tolerance on the ALU in simple pipelined processors.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

When Clocks Fail: On Critical Paths and Clock Faults.
Proceedings of the Smart Card Research and Advanced Application, 2010

2007
Differential Behavioral Analysis.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2007

2006
Integrated Evaluation Platform for Secured Devices.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

A Proposition for Correlation Power Analysis Enhancement.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2006

2001
Découverte automatique de circuits en électronique de puissance. (Automatic discovery of power electronic circuits).
PhD thesis, 2001


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