Bruno Riccò
Affiliations:- University of Bologna, Italy
According to our database1,
Bruno Riccò
authored at least 121 papers
between 1988 and 2020.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2003, "For contributions to thin oxide MOS devices and non volatile memories.".
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on id.loc.gov
On csauthors.net:
Bibliography
2020
Practical Determination of Solid Fat Content in Fats and Oils by Single-Wavelength Near-Infrared Analysis.
IEEE Trans. Instrum. Meas., 2020
2019
Computer Vision Approach for the Determination of Microbial Concentration and Growth Kinetics Using a Low Cost Sensor System.
Sensors, 2019
2017
Bacterial concentration detection using a portable embedded sensor system for environmental monitoring.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017
2016
Proceedings of the 2016 Virtual Reality International Conference, 2016
2014
Microelectron. J., 2014
2013
Proceedings of the SIGGRAPH Asia 2013 Symposium on Mobile Graphics and Interactive Applications, 2013
Proceedings of the 2013 ACM SIGCHI Conference on Human Factors in Computing Systems, 2013
2011
Proceedings of the SIGGRAPH Asia 2011 Emerging Technologies, 2011
2010
Microelectron. J., 2010
2009
Microelectron. J., 2009
Microelectron. J., 2009
2008
Proceedings of the International Conference on Computer Graphics and Interactive Techniques, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
2007
MOCA: A Low-Power, Low-Cost Motion Capture System Based on Integrated Accelerometers.
Adv. Multim., 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
2006
IEEE Trans. Instrum. Meas., 2006
Microelectron. J., 2006
CMOS DNA Sensor Array With Integrated A/D Conversion Based on Label-Free Capacitance Measurement.
IEEE J. Solid State Circuits, 2006
Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices.
Proceedings of the VLSI-SoC: Research Trends in VLSI and Systems on Chip, 2006
Innovative Optoelectronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices.
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the Pervasive Computing, 2006
Fully Electronic CMOS DNA Detection Array Based on Capacitance Measurement with On-Chip Analog-to-Digital Conversion.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
2005
Proceedings of the Systems Communications 2005 (ICW / ICHSN / ICMCS / SENET 2005), 2005
Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection.
Proceedings of the 2005 Design, 2005
2004
A low-power motion capture system with integrated accelerometers [gesture recognition applications].
Proceedings of the 1st IEEE Consumer Communications and Networking Conference, 2004
2003
Scan flip-flops with on-line testing ability with respect to input delay and crosstalk faults.
Microelectron. J., 2003
Automatic Repositioning Technique for Digital Cell Based Window Comparators and Implementation within Mixed-Signal DfT Schemes.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
Proceedings of 9th IEEE International Conference on Emerging Technologies and Factory Automation, 2003
2002
Microelectron. Reliab., 2002
Proceedings of the 2002 IEEE Wireless Communications and Networking Conference Record, 2002
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Parametric timing and power macromodels for high level simulation of low-swing interconnects.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
An adaptive data compression scheme for memory traffic minimization in processor-based systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the 2002 IEEE International Symposium on Biomedical Imaging, 2002
Proceedings of the 2002 IEEE International Conference on Robotics and Automation, 2002
Proceedings of the 2002 Design, 2002
Proceedings of the International Conference on Compilers, 2002
Proceedings of the International Conference on Compilers, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
SIGARCH Comput. Archit. News, 2001
On-line testing of transient and crosstalk faults affecting interconnections of FPGA-implemented systems.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
On-chip signal level evaluation for mixed-signal ICs using digital window comparators.
Proceedings of the 6th European Test Workshop, 2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Processor frequency setting for energy minimization of streaming multimedia application.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
2000
Signal Coding and CMOS Gates for Combinational Functional Blocks of Very Deep Submicron Self-checking Circuits.
VLSI Design, 2000
Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines.
IEEE Trans. Computers, 2000
On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values.
Proceedings of the 2000 Design, 2000
1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
Efficient switching activity computation during high-level synthesis of control-dominated designs.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
1998
Automatic and continuous offset compensation of MOS operational amplifiers using floating-gate transistors.
IEEE J. Solid State Circuits, 1998
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
Signal Coding Technique and CMOS Gates for Strongly Fault-Secure Combinational Functional Blocks.
Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998
Proceedings of the 1998 Design, 1998
1997
IEEE Trans. Very Large Scale Integr. Syst., 1997
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997
Proceedings of the 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems (DFT '97), 1997
1996
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
Experimental characterization of circuits for controlled programming of floating-gate MOSFET's.
IEEE J. Solid State Circuits, June, 1995
Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults.
J. Electron. Test., 1995
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995
Proceedings of the 1995 European Design and Test Conference, 1995
1994
IEEE J. Solid State Circuits, February, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Highly Testable and Compact 1-out-of-n CMOS Checkers.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994
CMOS Self Checking Circuits with Faulty Sequential Functional Block.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1994
1993
Design of an X-band transformer-coupled amplifier with improved stability and layout.
IEEE J. Solid State Circuits, June, 1993
IEEE J. Solid State Circuits, June, 1993
IEEE Trans. Very Large Scale Integr. Syst., 1993
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
A numerical method to compute isotropic band models from anisotropic semiconductor band structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993
Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993
A Highly Testable 1-out-of-3 CMOS Checker.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993
Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993
1992
IEEE J. Solid State Circuits, July, 1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992
J. Electron. Test., 1992
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992
Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992
1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991
IEEE Trans. Computers, 1991
Proceedings of the conference on European design automation, 1991
Proceedings of the conference on European design automation, 1991
1990
IEEE J. Solid State Circuits, October, 1990
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990
Eur. Trans. Telecommun., 1990
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990
1989
A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989
Proceedings of the Proceedings International Test Conference 1989, 1989
Proceedings of the Proceedings International Test Conference 1989, 1989
Proceedings of the Proceedings International Test Conference 1989, 1989
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989
1988
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988