Bruno George de Moraes

According to our database1, Bruno George de Moraes authored at least 5 papers between 2011 and 2013.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
On the impacts of pel decimation and High-Vt/Low-Vdd on SAD calculation.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

A low-power configurable VLSI architecture for sum of absolute differences calculation.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

Quality assessment of subsampling patterns for pel decimation targeting high definition video.
Proceedings of the 2013 IEEE International Conference on Multimedia and Expo, 2013

2011
An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011


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