Bruno de Carvalho Albertini

According to our database, Bruno de Carvalho Albertini authored at least 15 papers between 2007 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Testing the limits of SPDM: Authentication of intermittently connected devices.

Renan C. A. Alves, Otávio F. Freitas, Bruno C. Albertini, Marcos A. Simplício Jr.

Comput. Secur., 2025

2023

Benchmarking the Security Protocol and Data Model (SPDM) for component authentication.

Renan C. A. Alves, Bruno C. Albertini, Marcos A. Simplício Jr.

CoRR, 2023

2022

Securing hard drives with the Security Protocol and Data Model (SPDM).

Renan C. A. Alves, Bruno C. Albertini, Marcos A. Simplício Jr.

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021

Simulating quantized inference on convolutional neural networks.

Vitor Finotti, Bruno C. Albertini

Comput. Electr. Eng., 2021

2018

<i>WS</i>³<i>N</i>: Wireless Secure SDN-Based Communication for Sensor Networks.

Renan C. A. Alves, Doriedson A. G. Oliveira, Geovandro C. C. F. Pereira, Bruno C. Albertini, Cíntia B. Margi

Secur. Commun. Networks, 2018

A class of safe and efficient binary Edwards curves.

Luckas A. Farias, Bruno C. Albertini, Paulo S. L. M. Barreto

J. Cryptogr. Eng., 2018

2017

Performance Evaluation of Cryptographic Algorithms over IoT Platforms and Operating Systems.

Geovandro C. C. F. Pereira, Renan C. A. Alves, Felipe Leno da Silva, Roberto M. Azevedo, Bruno C. Albertini, Cíntia B. Margi

Secur. Commun. Networks, 2017

Automated Generation of HDL Implementations of Dadda and Wallace Tree Multipliers.

Lucas Gaia de Castro, Henrique Seiti Ogawa, Bruno de Carvalho Albertini

Proceedings of the VII Brazilian Symposium on Computing Systems Engineering, 2017

2015

Parallelism Level Analysis of Binary Field Multiplication on FPGAs.

Luckas A. Farias, Bruno C. Albertini, Paulo S. L. M. Barreto

Proceedings of the 2015 Brazilian Symposium on Computing Systems Engineering, 2015

2012

Computational reflection and its application to platform verification.

Bruno C. Albertini, Sandro Rigo, Guido Araujo

Des. Autom. Embed. Syst., 2012

2011

Abstractions level platforms.

Bruno C. Albertini

PhD thesis, 2011

2009

A novel verification technique to uncover out-of-order DUV behaviors.

Gabriel Marcilio, Luiz C. V. dos Santos, Bruno C. Albertini, Sandro Rigo

Proceedings of the 46th Design Automation Conference, 2009

2007

A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation.

Fernando Kronbauer, Alexandro Baldassin, Bruno C. Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

A Methodology and Toolset to Enable SystemC and VHDL Co-simulation.

Richard Maciel, Bruno C. Albertini, Sandro Rigo, Guido Araujo, Rodolfo Azevedo

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

A computational reflection mechanism to support platform debugging in SystemC.

Bruno C. Albertini, Sandro Rigo, Guido Araujo, Cristiano C. de Araújo, Edna Barros, Willians Azevedo

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007