Bruno de Abreu Silva

According to our database, Bruno de Abreu Silva authored at least 6 papers between 2011 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

A method to optimize performance/energy consumption relation for heterogeneous multi-core architectures on FPGA.

Bruno de Abreu Silva

PhD thesis, 2016

2015

Application-oriented cache memory configuration for energy efficiency in multi-cores.

Bruno de Abreu Silva, Lucas Albers Cuminato, Alexandre C. B. Delbem, Pedro C. Diniz, Vanderlei Bonato

IET Comput. Digit. Tech., 2015

Parameterizable Ethernet Network-on-Chip Architecture on FPGA.

Helio Fernandes da Cunha Junior, Bruno de Abreu Silva, Vanderlei Bonato

Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2012

Reducing the overall cache miss rate using different cache sizes for Heterogeneous Multi-core Processors.

Bruno de Abreu Silva, Lucas Albers Cuminato, Vanderlei Bonato

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Power/performance optimization in FPGA-based asymmetric multi-core systems.

Bruno de Abreu Silva, Vanderlei Bonato

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011

Accelerating Algorithms using a Dataflow Graph in a Reconfigurable System

Jorge Luiz e Silva, Joelmir José Lopes, Bruno de Abreu Silva, Antonio Carlos Fernandes da Silva

CoRR, 2011