Bruno C. Honorio

According to our database, Bruno C. Honorio authored at least 7 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

On the impact of mode transition on phased transactional memory performance.

Catalina Munoz Morales, Bruno C. Honorio, Joao P. L. de Carvalho, Alexandro Baldassin, Guido Araujo

J. Parallel Distributed Comput., March, 2023

2022

Using Barrier Elision to Improve Transactional Code Generation.

Bruno Chinelato Honorio, João P. L. de Carvalho, Catalina Munoz Morales, Alexandro Baldassin, Guido Araujo

ACM Trans. Archit. Code Optim., 2022

2021

Improving Phased Transactional Memory via Commit Throughput and Capacity Estimation.

Catalina Munoz Morales, Bruno C. Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, 2021

Accelerating Graph Applications Using Phased Transactional Memory.

Catalina Munoz Morales, Rafael Murari, Joao P. L. de Carvalho, Bruno Chinelato Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020

Using OpenMP to Detect and Speculate Dynamic DOALL Loops.

Bruno Chinelato Honorio, João P. L. de Carvalho, Munir S. Skaf, Guido Araujo

Proceedings of the OpenMP: Portable Multi-Level Parallelism on Modern Systems, 2020

Improving Transactional Code Generation via Variable Annotation and Barrier Elision.

João P. L. de Carvalho, Bruno C. Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2018

On the Efficiency of Transactional Code Generation: A GCC Case Study.

Bruno Chinelato Honorio, João P. L. de Carvalho, Alexandro José Baldassin

Proceedings of the Symposium on High Performance Computing Systems, 2018