Brian W. Curran
According to our database1,
Brian W. Curran
authored at least 26 papers
between 1991 and 2022.
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On csauthors.net:
Bibliography
2022
A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.
IEEE J. Solid State Circuits, 2022
2021
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
2018
A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2012
2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2010
Proceedings of the 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, 2010
2007
IBM J. Res. Dev., 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2006
4GHz+ low-latency fixed-point and binary floating-point execution units for the POWER6 processor.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
2002
IBM eServer z900 high-frequency microprocessor technology, circuits, and design methodology.
IBM J. Res. Dev., 2002
2001
Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors.
Proceedings of the SOC Design Methodologies, 2001
1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
1997
IEEE J. Solid State Circuits, 1997
Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.
IBM J. Res. Dev., 1997
IBM J. Res. Dev., 1997
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
1996
1991
IBM J. Res. Dev., 1991