Brian T. Davis

According to our database1, Brian T. Davis authored at least 5 papers between 2001 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Prediction in Dynamic SDRAM Controller Policies.
Proceedings of the Embedded Computer Systems: Architectures, 2009

2007
A Burst Scheduling Access Reordering Mechanism.
Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007

2005
The Bit-reversal SDRAM Address Mapping.
Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems, Dallas, Texas, USA, September 29, 2005

2004
Performance evaluation of exclusive cache hierarchies.
Proceedings of the 2004 IEEE International Symposium on Performance Analysis of Systems and Software, 2004

2001
Modern DRAM architectures.
PhD thesis, 2001


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