Brian Dziki

Orcid: 0000-0002-4866-7475

According to our database1, Brian Dziki authored at least 5 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2019
2020
2021
2022
2023
2024
0
1
2
3
2
2
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Self-Assertion-Based Countermeasures Within a RISC-V Microprocessor for Coverage of Information Leakage Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024

An Engineered Minimal-Set Stimulus for Periodic Information Leakage Fault Detection on a RISC-V Microprocessor.
Cryptogr., June, 2024

2022
Information Leakage Analysis Using a Co-Design-Based Fault Injection Technique on a RISC-V Microprocessor.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Node Monitoring as a Fault Detection Countermeasure against Information Leakage within a RISC-V Microprocessor.
Cryptogr., 2022

2019
Fault Testing a Synthesizable Embedded Processor at Gate Level using UltraScale FPGA Emulation.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019


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