Brian Dupaix
Orcid: 0000-0002-4423-5675
According to our database1,
Brian Dupaix
authored at least 15 papers
between 2014 and 2020.
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Bibliography
2020
IEEE Trans. Reliab., 2020
2019
Wide-Bandwidth, High-Linearity, 2.8-GS/s, 10-bit Accurate Sample and Hold Amplifier in 130-nm SiGe BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
IEEE J. Solid State Circuits, 2018
Sense amplifier offset cancellation and replica timing calibration for high-speed SRAMs.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
An on-chip resonant-gate-drive switched-capacitor converter for near-threshold computing achieving 70.2% efficiency at 0.92A/mm<sup>2</sup> current density and 0.4V output.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A High Linearity, 2.8 GS/s, 10-bit Accurate, Sample and Hold Amplifier in 130 nm SiGe BiCMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
IEEE J. Solid State Circuits, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
IEEE J. Solid State Circuits, 2016
2015
A fully-integrated switched capacitor voltage regulator for near-threshold applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Tracking energy efficiency of near-threshold design using process variation control techniques.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014