Brian Crites
Orcid: 0000-0003-1440-5060
According to our database1,
Brian Crites
authored at least 10 papers
between 2013 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2021
Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
2020
2019
Specification, Integration, and Benchmarking of Continuous Flow Microfluidic Devices: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019
Matrix Profile XIV: Scaling Time Series Motif Discovery with GPUs to Break a Quintillion Pairwise Comparisons a Day and Beyond.
Proceedings of the ACM Symposium on Cloud Computing, SoCC 2019, 2019
2018
PhD thesis, 2018
Proceedings of the 2018 IEEE International Symposium on Workload Characterization, 2018
2017
Diagonal Component Expansion for Flow-Layer Placement of Flow-Based Microfluidic Biochips.
ACM Trans. Embed. Comput. Syst., 2017
Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
2015
IEEE Des. Test, 2015
2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013