Brian Campbell

According to our database, Brian Campbell authored at least 3 papers in 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems.

Zongjian Chen, Priya Ananthanarayanan, Sukalp Biswas, Brian Campbell, Hao Chen, Shaishav Desai, Dominic Go, Rajat Goel, Vincent von Kaenel, Jason Kassoff, Fabian Klass, Weichun Ku, Tony Li, Jonathon Lin, Khurram Malik, Anup Mehta, Daniel Murray, Eric Shiu, Chris Shuler, Sribalan Santhanam, Greg Scott, Junji Sugisawa, Toshinari Takayanagi, Honkai John Tarn, Pradeep Trivedi, James Wang, Ricky Wen, John Yong

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A 2GHz, 7W (max) 64b Power^TM Microprocessor Core.

Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Power-Efficient Dual-Supply 64kB L1 Caches in a 65nm CMOS Technology.

Brian Campbell, James Burnette, Naveen Javarappa, Vincent von Kaenel

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007