Brandon Reagen
Orcid: 0000-0002-1932-2750
According to our database1,
Brandon Reagen
authored at least 60 papers
between 2013 and 2024.
Collaborative distances:
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Bibliography
2024
Trans. Mach. Learn. Res., 2024
NTTSuite: Number Theoretic Transform Benchmarks for Accelerating Encrypted Computation.
CoRR, 2024
CiFlow: Dataflow Analysis and Optimization of Key Switching for Homomorphic Encryption.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2024
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024
2023
IACR Cryptol. ePrint Arch., 2023
Orion: A Fully Homomorphic Encryption Compiler for Private Deep Neural Network Inference.
CoRR, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2022
CoRR, 2022
Proceedings of the International Conference on Machine Learning, 2022
2021
CoRR, 2021
Sisyphus: A Cautionary Tale of Using Low-Degree Polynomial Activations in Privacy-Preserving Deep Learning.
CoRR, 2021
Analysis and Mitigations of Reverse Engineering Attacks on Local Feature Descriptors.
CoRR, 2021
Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021
Proceedings of the 38th International Conference on Machine Learning, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Proceedings of the 32nd British Machine Vision Conference 2021, 2021
2020
Cheetah: Optimizations and Methods for PrivacyPreserving Inference via Homomorphic Encryption.
CoRR, 2020
Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020
SoK: Opportunities for Software-Hardware-Security Codesign for Next Generation Secure Computing.
Proceedings of the HASP@MICRO 2020: Hardware and Architectural Support for Security and Privacy, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
DeepRecSys: A System for Optimizing End-To-End At-Scale Neural Recommendation Inference.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
2019
CoRR, 2019
MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Proceedings of the 35th International Conference on Machine Learning, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers, ISBN: 978-3-031-01756-8, 2017
Cognitive Computing Safety: The New Horizon for Reliability / The Design and Evolution of Deep Learning Workloads.
IEEE Micro, 2017
A Fully Integrated Battery-Powered System-on-Chip in 40-nm CMOS for Closed-Loop Control of Insect-Scale Pico-Aerial Vehicle.
IEEE J. Solid State Circuits, 2017
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Using dynamic dependence analysis to improve the quality of high-level synthesis designs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
2014
Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architectures.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
2013
Quantifying acceleration: Power/performance trade-offs of application kernels in hardware.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013