Bradley F. Dutton
According to our database1,
Bradley F. Dutton
authored at least 8 papers
between 2009 and 2011.
Collaborative distances:
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Bibliography
2011
IEEE Trans. Ind. Electron., 2011
2010
On-Line Single Event Upset Detection and Correction in Field Programmable Gate Array Configuration Memories.
Int. J. Comput. Their Appl., 2010
The First Clock Cycle Is A Real BIST.
Proceedings of the 2010 International Conference on Embedded Systems & Applications, 2010
2009
Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs.
Proceedings of the 2009 International Conference on Embedded Systems & Applications, 2009
Embedded Processor Based Fault Injection and SEU Emulation for FPGAs.
Proceedings of the 2009 International Conference on Embedded Systems & Applications, 2009
Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs.
Proceedings of the ISCA 24th International Conference on Computers and Their Applications, 2009