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Brad Garni

Affiliations:
  • Freescale Semiconductor, Austin, TX, USA


According to our database1, Brad Garni authored at least 2 papers between 2005 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

2005
2006
2007
2008
0
1
2
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2008
A 180 Kbit Embeddable MRAM Memory Module.
[BibTeX]
[DOI]
Joseph J. Nahas
,
Thomas W. Andre
,
Brad Garni
,
Chitra K. Subramanian
,
Hal Lin
,
Syed M. Alam
,
Ken Papworth
,
William L. Martino
IEEE J. Solid State Circuits, 2008

2005
A 4-Mb 0.18-μm 1T1MTJ toggle MRAM with balanced three input sensing scheme and locally mirrored unidirectional write drivers.
[BibTeX]
[DOI]
Thomas W. Andre
,
Joseph J. Nahas
,
Chitra K. Subramanian
,
Bradley J. Garni
,
Halbert S. Lin
,
Asim Omair
,
William L. Martino
IEEE J. Solid State Circuits, 2005


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